Intel Celeron M 520 1.60 GHz BX80537520 Data Sheet

62

TRDY#

Input

TRDY# (Target Ready) is asserted by the target to indicate that it is ready to 
receive a write or implicit writeback data transfer. TRDY# must connect the 
appropriate pins of both FSB agents.

TRST#

Input

TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be 
driven low during power on Reset. Please refer to the ITP700 Debug Port 
Design Guide

 and the platform design guides for termination requirements and 

implementation details.

V

CC

Input

Processor core power supply.

V

CCA

[3:0]

Input

V

CCA

 provides isolated power for the internal processor core PLLs. Refer to the 

platform design guides for complete implementation details. 

V

CCP

Input

Processor I/O power supply.

V

CC

Q

[1:0]

Input

Quiet power supply for on die COMP circuitry. These pins should be connected 
to V

CCP

 

on the motherboard. However, these connections should enable addition 

of decoupling on the V

CC

Q 

lines if necessary. 

V

CCSENSE

Output

V

CCSENSE

 is an isolated low impedance connection to processor core power 

(V

CC

). It can be used to sense or measure power near the silicon with little noise. 

Please refer to the platform design guides for termination recommendations and 
more details.

VID[5:0]

Output

VID[5:0] (Voltage ID) pins are used to support automatic selection of power 
supply voltages (Vcc). Unlike some previous generations of processors, these 
are CMOS signals that are driven by the Intel Celeron M processor. The voltage 
supply for these pins must be valid before the VR can supply Vcc to the 
processor. Conversely, the VR output must be disabled until the voltage supply 
for the VID pins becomes valid. The VID pins are needed to support the 
processor voltage specification variations. See 

 for the encoding of these 

pins. The VR must supply the voltage that is requested by the pins, or disable 
itself.

V

SSSENSE

Output

V

SSSENSE

 is an isolated low impedance connection to processor core V

SS

. It can 

be used to sense or measure ground near the silicon with little noise. Please 
refer to the platform design guides for termination recommendations and more 
details.