Transcend 512MB SDRAM 144Pin SO-DIMM PC133 Unbuffer Non-ECC Memory TS64MSS64V6F User Manual
Product codes
TS64MSS64V6F
T
T
T
S
S
S
6
6
6
4
4
4
M
M
M
S
S
S
S
S
S
6
6
6
4
4
4
V
V
V
6
6
6
F
F
F
144PIN PC133 Unbuffered SO-DIMM
512MB With 32Mx8 CL3
Description
Module (S.O.DIMM), mounted 16 pieces of 256-Mbit
SDRAM sealed in TSOP package and 1 piece of serial
EEPROM (2-kbit) for Presence Detect (PD). An outline of
the products is 144-pin Zig Zag Dual tabs socket type
compact and thin package. Therefore, they make high
density mounting possible without surface mount
technology. They provide common data inputs and outputs.
Decoupling capacitors are mounted beside TSOP on the
module board. Note: Do not push the cover or drop the
modules in order to protect from mechanical defects, which
would be electrical defects.
Features
• Performance Range : PC-133
• Conformed to JEDEC Standard Spec.
• Burst Mode Operation.
• Auto and Self Refresh.
• CKE Power Down Mode.
• DQM Byte Masking (Read/Write)
• Serial Presence Detect (SPD) with serial EEPROM
• LVTTL compatible inputs and outputs.
• Single 3.3V ± 0.3V power supply.
• MRS cycle with address key programs.
• Conformed to JEDEC Standard Spec.
• Burst Mode Operation.
• Auto and Self Refresh.
• CKE Power Down Mode.
• DQM Byte Masking (Read/Write)
• Serial Presence Detect (SPD) with serial EEPROM
• LVTTL compatible inputs and outputs.
• Single 3.3V ± 0.3V power supply.
• MRS cycle with address key programs.
Latency (Access from column address)
Burst Length (1,2,4,8)
Data Sequence (Sequential & Interleave)
• All inputs are sampled at the positive going edge of
Pin Identification
Symbol
Function
A0~A12,BA0,BA1
Address input
DQ0~DQ63,
Data Input / Output.
CLK0,CLK1
Clock Input.
CKE0,CKE1
Clock Enable Input.
/CS0~/CS3
Chip Select Input.
/RAS
Row Address Strobe
/CAS
Column Address Strobe
/WE
Write Enable
DQM0~DQM7
Data (DQ) Mask
SA0~SA2
Address in EEPROM
SCL
Serial PD Clock
SDA
Serial PD Add/Data input/output
Vcc
+3.3 Voltage Power Supply
Vss
Ground
NC
No Connection
the system clock.
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