Intel G1620T CM8063701448300 User Manual

Intel

Product codes

CM8063701448300

Datasheet

1141

PCU – Intel

®

Legacy Block (iLB) Overview

23.3

PCU iLB Interrupt Decode and Route

Table 169.

Summary of PCU iLB Interrupt Decode and Route Memory Mapped I/O

Registers—ILB_BASE_ADDRESS

Offset

Size

Register ID—Description

Default

Value

0h

4

“ACTL—Offset 0h” on page 1142

00000003h

4h

4

“MC—Offset 4h” on page 1143

00000000h

8h

1

“PIRQA—Offset 8h” on page 1144

80h

9h

1

“PIRQB—Offset 9h” on page 1144

80h

Ah

1

“PIRQC—Offset Ah” on page 1145

80h

Bh

1

“PIRQD—Offset Bh” on page 1146

80h

Ch

1

“PIRQE—Offset Ch” on page 1146

80h

Dh

1

“PIRQF—Offset Dh” on page 1147

80h

Eh

1

“PIRQG—Offset Eh” on page 1148

80h

Fh

1

“PIRQH—Offset Fh” on page 1148

80h

10h

4

“SCNT—Offset 10h” on page 1149

00000000h

14h

4

“KMC—Offset 14h” on page 1150

00000000h

18h

4

“FS—Offset 18h” on page 1151

00112233h

1Ch

4

“BC—Offset 1Ch” on page 1152

00000100h

20h

2

“IR0—Offset 20h” on page 1153

0000h

22h

2

“IR1—Offset 22h” on page 1153

0000h

24h

2

“IR2—Offset 24h” on page 1154

0000h

26h

2

“IR3—Offset 26h” on page 1155

0000h

28h

2

“IR4—Offset 28h” on page 1155

0000h

2Ah

2

“IR5—Offset 2Ah” on page 1156

0000h

2Ch

2

“IR6—Offset 2Ch” on page 1157

0000h

2Eh

2

“IR7—Offset 2Eh” on page 1157

0000h

30h

2

“IR8—Offset 30h” on page 1158

0000h

32h

2

“IR9—Offset 32h” on page 1159

0000h

34h

2

“IR10—Offset 34h” on page 1159

0000h

36h

2

“IR11—Offset 36h” on page 1160

0000h

38h

2

“IR12—Offset 38h” on page 1161

0000h

3Ah

2

“IR13—Offset 3Ah” on page 1161

0000h

3Ch

2

“IR14—Offset 3Ch” on page 1162

0000h

3Eh

2

“IR15—Offset 3Eh” on page 1163

0000h

40h

2

“IR16—Offset 40h” on page 1163

0000h

42h

2

“IR17—Offset 42h” on page 1164

0000h

44h

2

“IR18—Offset 44h” on page 1165

0000h

46h

2

“IR19—Offset 46h” on page 1165

0000h

48h

2

“IR20—Offset 48h” on page 1166

0000h