Intel G1620T CM8063701448300 User Manual
Product codes
CM8063701448300
PCU – iLB – IO APIC
1250
Datasheet
30.4
Indirect I/O APIC Registers
These registers are selected with the IDX register, and read/written through the WDW
register. Accessing these registers must be done as DW requests; otherwise,
unspecified behavior will result. Software should not attempt to write to reserved
registers. Reserved registers may return non-zero values when read.
register. Accessing these registers must be done as DW requests; otherwise,
unspecified behavior will result. Software should not attempt to write to reserved
registers. Reserved registers may return non-zero values when read.
Note:
There is one pair of redirection (RTE) registers per interrupt line. Each pair forms a 64-
bit RTE register.
bit RTE register.
Note:
Specified offsets should be placed in IDX, not added to IDX.