Intel G1620T CM8063701448300 User Manual

Datasheet

347

Default: 00h

7

1b

RO

Fast Back-to-Back Capable (FBBC): Reserved as 1 Read-Only.

6

0b

RO

User Definable Features (UDF): Reserved as 0. Read-Only.

5

0b

RO

66 MHz Capable (MC): Reserved as 0. Read-Only.

4

1b

RO

Capabilities List (CL): Hardwired to 1 indicating that offset 34h contains a valid 

capabilities pointer.

3

0b

RO/V

Interrupt Status (IS): This read-only bit reflects the state of this function's interrupt 

at the input of the enable/disable logic. This bit is a 1 when the interrupt is asserted. 

This bit will be 0 when the interrupt is deasserted. The value reported in this bit is 

independent of the value in the Interrupt Enable bit.

2:0

000b

RO

Reserved (RSVD): Reserved.

Type: PCI Configuration Register

(Size: 8 bits)

Power Well: Core

7

4

0

0

0

0

0

0

0

0

0

RID

7:0

00h

RO/V

Revision ID (RID): See Chap 6 for value.