Intel G1620T CM8063701448300 User Manual
Product codes
CM8063701448300
Datasheet
539
Intel
®
High Definition Audio (Intel
®
HD Audio)
Codec commands and responses are also transported to and from the CODEC using
DMA engines. The DMA engine dedicated to transporting commands from the
Command Output Ring Buffer (CORB) in memory to the CODEC(s) is called the CORB
engine. The DMA engine dedicated to transporting responses from the CODEC(s) to the
Response Input Ring Buffer in memory is called the RIRB engine. Every command sent
to a CODEC yields a response from that CODEC. Some commands are “broadcast” type
commands in which case a response will be generated from each CODEC. A CODEC
may also be programmed to generate unsolicited responses, which the RIRB engine
also processes. The platform also supports Programmed IO-based Immediate
Command/Response transport mechanism that can be used by BIOS prior to memory
initialization.
DMA engines. The DMA engine dedicated to transporting commands from the
Command Output Ring Buffer (CORB) in memory to the CODEC(s) is called the CORB
engine. The DMA engine dedicated to transporting responses from the CODEC(s) to the
Response Input Ring Buffer in memory is called the RIRB engine. Every command sent
to a CODEC yields a response from that CODEC. Some commands are “broadcast” type
commands in which case a response will be generated from each CODEC. A CODEC
may also be programmed to generate unsolicited responses, which the RIRB engine
also processes. The platform also supports Programmed IO-based Immediate
Command/Response transport mechanism that can be used by BIOS prior to memory
initialization.
15.1
Signal Descriptions
Please see
for additional details.
The signal description table has the following headings:
•
Signal Name: The name of the signal/pin
•
Direction: The buffer direction can be either input, output, or I/O (bidirectional)
•
Type: The buffer type found in
•
Description: A brief explanation of the signal’s function
The signals in the table above are all multiplexed and may be used by other functions.
Table 121. Signals
Signal Name
Direction/
Type
Description
HDA_RST#
O
Intel HD Audio Reset: Master H/W reset to external Codecs
HDA_SYNC
O
Intel HD Audio Sync: 48 kHz fixed rate
HDA_CLK
O
Intel HD Audio Bit Clock (Output): 24 MHz serial data clock
generated by the Intel HD Audio controller
HDA_SDO
O
Intel HD Audio Data Out: Serial TDM data output to the Codec(s).
The serial output is double-pumped for a bit rate of 48 Mb/s
HDA_SDI[1:0]
I/O
Intel HD Audio Serial Data In[1:0]: Serial TDM data input from
the CODEC(s). The serial input is single-pumped for a bit rate of 24
Mb/s.