Intel G1620T CM8063701448300 User Manual
Product codes
CM8063701448300
Datasheet
929
PCI Express* 2.0
17.14.2
TX_DWORD1 (tx_dword1)—Offset 4h
Access Method
Default: 20000000h
30:24
26h
RW
ofrcr1main3_6_0: number of slices in active R1 for swing 3 (DE)
23
0h
RO
reserved503: reserved
22:16
0h
RO
reserved502: reserved
15
0h
RO
reserved501: reserved
14:8
0h
RO
reserved500: reserved
7
0h
RW
ofrcdrvr1r2: enable forcing number of used slices in all fir levels.
6:0
3Ah
RW
ofrcr1main0_6_0: number of slices in active R1 for swing 0 (FS)
Bit
Range
Default &
Access
Description
Type: Message Bus Register
(Size: 32 bits)
tx_dword1: [Port: 0xA6] + (880h + 4h)
Op Codes:
0h - Read, 1h - Write
0h - Read, 1h - Write
31
28
24
20
16
12
8
4
0
0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
re
se
rv
ed
510
ofr
cr2s
hort3_5_0
re
se
rv
ed
509
re
se
rv
ed
508
re
se
rv
ed
507
re
se
rv
ed
506
re
se
rv
ed
505
ofr
cr2s
hort0_5_0
Bit
Range
Default &
Access
Description
31:30
0h
RO
reserved510: reserved
29:24
20h
RW
ofrcr2short3_5_0: number of slices in R2 for swing 3 (DE) MSB has no effect.
23:22
0h
RO
reserved509: reserved
21:16
0h
RO
reserved508: reserved
15:14
0h
RO
reserved507: reserved
13:8
0h
RO
reserved506: reserved