Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
17
Datasheet Volume Two: Functional Description, February 2014
Overview
1
Overview
1.1
Introduction
The Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family processors are the 
next generation of 64-bit, multi-core enterprise processors built on 22-nanometer 
process technology. The Intel Xeon processor E7 v2 product family implements multiple 
multi-threaded (two threads) cores based upon the Intel Xeon processor E7 v2 product 
family core design. A large, up to 37.5 MB, last-level cache (LLC) has been 
implemented to be shared across all active cores.The Intel Xeon processor E7 v2 
product family supports two on-chip memory controllers. It is designed primarily for 
glueless four- or eight-socket multiprocessor systems, and features three Intel® 
QuickPath Interconnects (Intel® QPI) and four Intel® Scalable Memory Interconnect 
(Intel® SMI) channels.
The Intel® Xeon® E7 v2 product family-based platform supports four fully-connected 
Intel Xeon processor E7 v2 product family sockets, where each Intel Xeon processor E7 
v2 product family uses three Intel QuickPath Interconnects to connect to the other 
sockets and can connect to the PCH via the x4 DMI Gen 2 channel. The Intel Xeon 
processor E7 v2 product family maintains cache coherence at the platform level by 
supporting the Intel QuickPath Interconnect source broadcast snoopy protocol.
The Intel Xeon processor E7 v2 product family is designed to support Intel QuickPath 
Interconnects at speeds of 8, 7.2 and 6.4 GT/s and DDR3 - 1067, 1333 and 1600 MT/s 
memory speeds. It uses a power-through-the-pins power delivery system and new 
socket R1.
Note:
Unless specifically required for clarity, this document will use ‘processor’ in place of the 
specific product name. 
The Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family Datasheet Volume 
Two: Functional Description provides register documentation and functional description 
of major functional areas of the processor non-core design, and additional features 
pertinent to implementation and operation of the processor.
The key features of the processor chip are as follows:
• Multi-threaded cores, two threads per core
• Socket types: Socket R1 (2011-0 land FC-LGA package)
• Operating Frequency: Base/TDP frequency range is 1.9 GHz - 3.4 GHz (Please 
review the SKU specific details in the spec update) 
• Target TDP (Thermal Design Power) Consumption: up to 155 W
• Last Level Cache: Up to 37.5 MB
• Intel QPI interfaces: up to three interfaces each operating at up to 8.0 GT/s 
• Supports 48-bit virtual addressing and 46-bit physical addressing
• Two integrated Memory Controllers provide ample memory bandwidth and memory 
capacity for demanding enterprise applications: 
— Each memory controller manages two Intel SMI2 channels, operated in either 
independent or lockstep mode.
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