Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
219
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.2.43 DEVCTRL
PCI Express Device Control.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0 (DMI2 Mode)
Offset:
0xf0
Bus:
0
Device:
0Function:0 (PCIe* Mode)
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x98
Bit
Attr
Default
Description
15:15
RV
-
Reserved. 
14:12
RO
0x0
max_read_request_size:
PCI Express/DMI ports in Processor do not generate requests greater 
than 64B and this field is RO.
11:11
RO
0x0
enable_no_snoop:
Not applicable to DMI or PCIe* root ports since they never set the ‘No 
Snoop’ bit for transactions they originate (not forwarded from peer) to 
PCI Express/DMI. This bit has no impact on forwarding of NoSnoop 
attribute on peer requests. 
10:10
RO
0x0
auxiliary_power_management_enable:
Not applicable to Processor
9:9
RO
0x0
phantom_functions_enable:
Not applicable to IIO since it never uses phantom functions as a 
requester.
8:8
RW
RO (Device 0 
Function 0)
0x0
extended_tag_field_enable:
N/A since IIO it never generates any requests on its own that uses 
tags 7:5. Note though that on peer to peer writes, IIO forwards the 
tag field along without modification and tag fields 7:5 could be set 
and that is not impacted by this bit. 
7:5
RW_LV
RW (Device 0 
Function 0)
0x0
max_payload_size:
000: 128B max payload size
001: 256B max payload size
others: alias to 128B
IIO can receive packets equal to the size set by this field.
IIO generate read completions as large as the value set by this field.
IIO generates memory writes of max 64B.
4:4
RO
0x0
enable_relaxed_ordering:
Not applicable to root/DMI ports since they never set relaxed ordering 
bit as a requester (this does not include tx forwarded from peer 
devices). This bit has no impact on forwarding of relaxed ordering 
attribute on peer requests.
3:3
RW
0x0
unsupported_request_reporting_enable:
This bit controls the reporting of unsupported requests that IIO itself 
detects on requests its receives from a PCI Express/DMI port.
0: Reporting of unsupported requests is disabled
1: Reporting of unsupported requests is enabled.
Refer to PCI Express Base Specification, Revision 2.0 for complete 
details of how this bit is used in conjunction with other bits to UR 
errors.
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