Intel E7-8891 v2 CM8063601377422 User Manual

236

Intel

®

 Xeon

® 

Processor E7-2800/4800/8800 v2 Product Family

Datasheet Volume Two: Functional Description, February 2014

PCI Express Root Capabilities.

PCI Express Root Status.

15:1

RV

-

Reserved.

0:0

RO

RW_O (Device 0 

Function 0)

0x1

0x0 (Device 0 

Function 0)

crs_software_visibility:

This bit, when set, indicates that the Root Port is capable of 

returning Configuration Request Retry Status (CRS) Completion 

Status to software. Intel Xeon processor E7-2800/4800/8800 v2 

product family Product Family supports this capability.

31:18

RV

-

Reserved.

17:17

RO_V

0x0

pme_pending:

This field indicates that another PME is pending when the PME Status bit is 

set. When the PME Status bit is cleared by software; the pending PME is 

delivered by hardware by setting the PME Status bit again and updating the 

Requestor ID appropriately. The PME pending bit is cleared by hardware if no 

more PMEs are pending.

16:16

RW1C

0x0

pme_status:

This field indicates a PM_PME message (either from the link or internally from 

within that root port) was received at the port.
1: PME was asserted by a requester as indicated by the PME Requester ID 

field
This bit is cleared by software by writing a '1'. Note that the root port itself 

could be the source of a PME event when a hotplug event is observed when 

the port is in D3hot state.

15:0

RO_V

0x0

pme_requester_id:

This field indicates the PCI requester ID of the last PME requestor. If the root 

port itself was the source of the (virtual) PME message, then a RequesterID 

of CPUBUSNO0:DevNo:FunctionNo is logged in this field.