Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
256
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.2.77 ERRCAP
Advanced Error capabilities and Control Register.
14.2.78 HDRLOG[0:3]
Header Log 0-3.
This register contains the header log when the first error occurs. Headers of the 
subsequent errors are not logged.
14.2.79 RPERRCMD
Root Port Error Command.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x160
Bit
Attr
Default
Description
31:9
RV
-
Reserved.
8:8
RO
0x0
ecrc_check_enable:
N/A for IIO.
7:7
RO
0x0
ecrc_check_capable:
N/A for IIO.
6:6
RO
0x0
ecrc_generation_enable:
N/A for IIO.
5:5
RO
0x0
ecrc_generation_capable:
N/A for IIO.
4:0
ROS_V
0x0
first_error_pointer:
The First Error Pointer is a read-only register that identifies the bit position of 
the first unmasked error reported in the Uncorrectable Error register. In case 
of two errors happening at the same time, the highest error type (MSB-
>LSB) in UNCERRSTS will be the one that is logged. This field is rearmed to 
capture new errors when the status bit indicated by this field is cleared by 
software. 
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x164, 0x168, 0x16c, 0x170
Bit
Attr
Default
Description
31:0
ROS_V
0x0
hdr:
Logs the first DWORD of the header on an error condition.
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