Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
276
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
Check that the perfmon registers are per “cluster”.
14.2.106 PXP2CAP
Secondary PCI Express Extended Capability Header.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
0Function:0
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x232
Bit
Attr
Default
Description
15:3
RV
-
Reserved.
2:0
ROS_V
0x0
xp_cluster_global_first_error_pointer:
This field points to which of the 3 errors indicated in the XPGLBERRSTS 
register happened first. This field is only valid when the corresponding status 
bit is set and this field is rearmed to load again when the status bit indicated 
to by this pointer is cleared by software from 1 to 0.Value of 0x0 corresponds 
to bit 0 in XPGLBERRSTS register, value of 0x1 corresponds to bit 1, and so 
forth. 
Type:
CFG
PortID:
N/A
Bus:
0
Device:
2Function:0-3
Bus:
0
Device:
3Function:0-3
Offset:
0x250
Bit
Attr
Default
Description
31:20
RO
0x280
nxtptr:
Next Capability Offset.
This field contains the offset to the next PCI Express Extended Capability 
structure or 000h if no other items exist in the linked list of capabilities.
19:16
RW_O
0x1
version:
This field is a PCI-SIG defined version number that indicates the version of 
the Capability structure present.
15:0
RW_O
0x19
id:
This field is a PCI SIG defined ID number that indicates the nature and 
format of the Extended Capability. PCI Express Extended Capability ID for 
the Secondary PCI Express Extended Capability is 0019h.
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