Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
280
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.2.110 LN[4:7]EQ
Lane 4 through Lane 7 Equalization Control
This register is unused when the link is configured at x4 in the bifurcation register. 
Type:
CFG
PortID:
N/A
Bus:
0
Device:
2Function:0, 2
Bus:
0
Device:
3Function:0, 2
Offset:
0x264, 0x266, 0x268, 0x26a
Bit
Attr
Default
Description
15:15
RV
-
Reserved.
14:12
RW_O
0x7
dnrxpreset:
Downstream Component Receiver Preset Hint  
Receiver Preset Hint for Downstream Component with the following 
encoding. The Upstream component must pass on this value in the EQ 
TS2’es.
000b: -6 dB 
001b: -7 dB
010b: -8 dB
011b: -9 dB
100b: -10 dB 
101b: -11 dB 
110b: -12 dB 
111b: Reserved
For a Downstream Component, this field reflects the latest Receiver Preset 
value requested from the Upstream Component on Lane 0. The default value 
is 111b. 
11:8
RW_O
0x8
dntxpreset:
Downstream Component Transmitter Preset  
Transmitter Preset for Downstream Component with the following encoding. 
The Upstream component must pass on this value in the EQ TS2’es.
0000b: -6.0 dB for deemphasis, 0 dB for preshoot 
0001b: -3.5 dB for deemphasis, 0 dB for preshoot 
0010b: -4.5 dB for deemphasis, 0 dB for preshoot 
0011b: -2.5 dB for deemphasis, 0 dB for preshoot 
0100b: 0 dB for deemphasis, 0 dB for preshoot 
0101b: 0 dB for deemphasis, 2.0 dB for preshoot 
0110b: 0 dB for deemphasis, 2.5 dB for preshoot 
0111b: -6.0 dB for deemphasis, 3.5 dB for preshoot 
1000b: -3.5 dB for deemphasis, 3.5 dB for preshoot 
1001b: 0 dB for deemphasis, 3.5 dB for preshoot 
others: reserved
For a Downstream Component, this field reflects the latest Transmitter 
Preset requested from the Upstream Component on Lane N. 
Notes: 
1) P0, P1, P4, P7, P8 and P9 are used for normal situation. 
2) P2, P3, P5 and P6 are used only for validation purpose, such as to run 
PCIe* Tx CEM test. 
7:7
RV
-
Reserved.
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