Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
361
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.6.14 PXPCAPID
14.6.15 PXPNXTPTR
14.6.16 PXPCAP
14.6.17 HDRTYPECTRL
PCI Header Type Control
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x40
Bit
Attr
Default
Description
7:0
RO
0x10
capability_id:
Provides the PCI Express capability ID assigned by PCI-SIG.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x41
Bit
Attr
Default
Description
7:0
RO
0x0
next_ptr:
This field is set to the PCI PM capability.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x42
Bit
Attr
Default
Description
15:14
RV
-
Reserved. 
13:9
RO
0x0
interrupt_message_number_n_a:
8:8
RO
0x0
slot_implemented_n_a:
7:4
RO
0x9
device_port_type:
This field identifies the type of device. It is set to for the DMA to indicate root 
complex integrated endpoint device.
3:0
RO
0x2
capability_version:
This field identifies the version of the PCI Express capability structure. Set to 
2h for PCI Express and DMA devices for compliance with the extended base 
registers.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x80
Bit
Attr
Default
Description
7:3
RV
-
Reserved. 
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