Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
379
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.6.45 VTUNCERRSTS
Intel
®
VT-d Uncorrectable Error Status.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x1a8
Bit
Attr
Default
Description
31:31
RW1CS
0x0
vtderr:
When set, this bit is set when a Intel
®
VT-d spec defined error has been 
detected (and logged in the Intel
®
VT-d fault registers)
30:9
RV
-
Reserved1:
Reserved.
8:8
RW1CS
0x0
protmemviol:
Protected memory region space violated status
7:7
RW1CS
0x0
miscerrs:
This error bit is set:
1. When TE is off DMA/INTR request has AT set to nonzero value.
2. When TE is on and vtdprivc0 bit 30 is set to 1:
a. The DMA read request is in interrupt address range 0XFEE.
b. The DMA request is a translated write request(AT=10)
6:6
RW1CS
0x0
unsucc_ci_rdcp:
Unsuccessful status received in the coherent interface read completion 
status.
5:5
RW1CS
0x0
perr_tlb1:
TLB1 Parity Error Status.
4:4
RW1CS
0x0
perr_tlb0:
TLB0 Parity Error Status.
3:3
RW1CS
0x0
perr_l3_lookup:
Data Parity error while doing a L3 lookup status.
2:2
RW1CS
0x0
perr_l2_lookup:
Data Parity error while doing a L2 lookup status.
1:1
RW1CS
0x0
perr_l1_lookup:
Data Parity error while doing a L1 lookup status.
0:0
RW1CS
0x0
perr_context_cache:
Data Parity error while doing a context cache lookup status.
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