Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
391
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.6.53 IRP[0:1]DELS
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x804
Bit
Attr
Default
Description
31:14
RV
-
Reserved:
13:13
RW_L
0x1
use_bgf_cdt_for_bgf_empty:
12:12
RV
-
Reserved.
11:10
RW_L
0x2
cfg_retry_timeout:
0: 256ms
1: 4s
2: Disabled
3: 2us
has a +100% timeout error
9:8
RW_L
0x0
dbg_field_sel:
7:2
RW_L
0x0
dbg_entry_num_sel:
1:1
RW_L
0x1
auto_dbg_sig_en:
puts out cache entry related info on a round robin basis
0:0
RW_L
0x0
dbg_sig_en:
enables reading address CAM in unused cycles.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:0
Offset:
0x808, 0x810
Bit
Attr
Default
Description
63:36
RV
-
Reserved.
35:32
RW_L
0x0
dbg_ev_set_ln_sel8:
31:28
RW_L
0x0
dbg_ev_set_ln_sel7:
27:24
RW_L
0x0
dbg_ev_set_ln_sel6:
23:20
RW_L
0x0
dbg_ev_set_ln_sel5:
19:16
RW_L
0x0
dbg_ev_set_ln_sel4:
15:12
RW_L
0x0
dbg_ev_set_ln_sel3:
11:8
RW_L
0x0
dbg_ev_set_ln_sel2:
7:4
RW_L
0x0
dbg_ev_set_ln_sel1:
3:0
RW_L
0x0
dbg_ev_set_ln_sel0:
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