Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
401
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.7.1
VTD[0:1]_VERSION
Intel
®
VT-d Version Number.
14.7.2
VTD[0:1]_CAP
Intel
®
VT-d Capabilities.
VTD1_INV_COMP_EVT_UPRADDR
0x10ac
32
VTD1_INTR_REMAP_TABLE_BASE
0x10b8
64
VTD1_FLTREC0_GPA
0x1100
64
VTD1_FLTREC0_SRC
0x1108
64
VTD1_INVADDRREG
0x1200
64
VTD1_IOTLBINV
0x1208
64
Register name
Offset
Size
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x0
, 0x1000
Bit
Attr
Default
Description
31:8
RV
-
Reserved.
7:4
RO
0x1
major_revision:
3:0
RO
0x0
minor_revision:
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x8, 0x1008
Bit
Attr
Default
Description
63:56
RV
-
Reserved.
55:55
RO
0x1
dma_read_draining:
The processor supports hardware based draining 
54:54
RO
0x1
dma_write_draining:
The processor supports hardware based write draining 
53:48
RO
0x12
mamv:
The processor support MAMV value of 12h (up to 1G super pages). 
47:40
RO
0x7
number_of_fault_recording_registers:
The processor supports 8 fault recording registers
39:39
RO
0x1
page_selective_invalidation:
Supported in IIO
38:38
RV
-
Reserved.
37:34
RW_O
0x3
super_page_support:
2 MB, 1G supported.
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