Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
406
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.7.5
VTD[0:1]_GLBSTS
Intel
®
VT-d Global Status.
23:23
RW
0x0
cfi:
Compatibility Format Interrupt
Software writes to this field to enable or disable Compatibility Format 
interrupts on Intel® 64 platforms. The value in this field is effective only 
when interrupt-remapping
is enabled and Legacy Interrupt Mode is active.
0: Block Compatibility format interrupts.
1: Process Compatibility format interrupts as pass-through (bypass interrupt
remapping).
Hardware reports the status of updating this field through the CFIS field in 
the
Global Status register.
This field is not implemented on Itanium® platforms. 
22:0
RV
-
Reserved.
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x18, 0x1018
Bit
Attr
Default
Description
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x1c, 0x101c
Bit
Attr
Default
Description
31:31
RO_V
0x0
translation_enable_status:
When set, indicates that translation hardware is enabled and when clear 
indicates the translation hardware is not enabled.
30:30
RO_V
0x0
set_root_table_pointer_status:
This field indicates the status of the root- table pointer in hardware.This field 
is cleared by hardware when software sets the SRTP field in the Global 
Command register. This field is set by hardware when hardware finishes the 
set root-table pointer operation (by performing an implicit global invalidation 
of the context-cache and IOTLB, and setting/updating the root-table pointer 
in hardware with the value provided in the Root-Entry Table Address 
register). 
29:29
RO
0x0
set_fault_log_pointer_status:
N/A to processor.
28:28
RO
0x0
advanced_fault_logging_status:
N/A to processor.
27:27
RO
0x0
write_buffer_flush_status:
N/A to processor.
26:26
RO_V
0x0
queued_invalidation_interface_status:
IIO sets this bit once it has completed the software command to enable the 
queued invalidation interface. Till then this bit is 0. 
25:25
RO_V
0x0
interrupt_remapping_enable_status:
OH sets this bit once it has completed the software command to enable the 
interrupt remapping interface. Till then this bit is 0.
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