Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
410
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.7.9
NONISOCH_FLTEVTCTRL
Fault Event Control.
14.7.10 NONISOCH_FLTEVTDATA
Fault Event Data.
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x38
Bit
Attr
Default
Description
31:31
RW
0x1
fault_nonisoch_msgmsk:
1: Hardware is prohibited from issuing interrupt message requests.
0: Software has cleared this bit to indicate interrupt service is available. 
When a faulting condition is detected, hardware may issue a interrupt 
request (using the fault event data and fault event address register values) 
depending on the state of the interrupt mask and interrupt pending bits.
30:30
RO_V
0x0
fault_nonisoch_msi_pend:
Hardware sets the IP field whenever it detects an interrupt condition. 
Interrupt condition is defined as when an interrupt condition occurs when 
hardware records a fault through one of the Fault Recording registers and 
sets the PPF field in Fault Status register. - Hardware detected error 
associated with the Invalidation Queue, setting the IQE field in the Fault 
Status register.
- Hardware detected invalidation completion timeout error, setting the ICT 
field in the Fault Status register.
- If any of the above status fields in the Fault Status register was already set 
at the time of setting any of these fields, it is not treated as a new interrupt 
condition.
The IP field is kept set by hardware while the interrupt message is held 
pending. The interrupt message could be held pending due to interrupt mask 
(IM field) being set, or due to other transient hardware conditions.
The IP field is cleared by hardware as soon as the interrupt message pending 
condition is serviced. This could be due to either
(a) Hardware issuing the interrupt message due to either change in the 
transient hardware condition that caused interrupt message to be held 
pending or due to software clearing the IM field.
(b) Software servicing all the pending interrupt status fields in the Fault 
Status register. 
- PPF field is cleared by hardware when it detects all the Fault Recording 
registers have Fault (F) field clear.
- Other status fields in the Fault Status register is cleared by software 
writing back the value read from the respective fields.
29:0
RO
0x0
fault_nonisoch_msgmsk_const:
Type:
MEM
PortID:
8’h7e
Bus:
0
Device:
5Function:0
Offset:
0x3c
Bit
Attr
Default
Description
31:16
RO
0x0
fault_nonisoch_data_const:
15:0
RW
0x0
fault_nonisoch_data:
downloadlike
ArtboardArtboardArtboard
Report Bug