Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
428
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.8.16 PXPCAP
14.8.17 IRPPERRSV
IRP Protocol Error Severity.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x42
Bit
Attr
Default
Description
15:14
RV
-
Reserved.
13:9
RO
0x0
interrupt_message_number_n_a:
8:8
RO
0x0
slot_implemented_n_a:
7:4
RO
0x9
device_port_type:
This field identifies the type of device. It is set to for the DMA to indicate root 
complex integrated endpoint device.
3:0
RO
0x2
capability_version:
This field identifies the version of the PCI Express capability structure. Set to 
2h for PCI Express and DMA devices for compliance with the extended base 
registers.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x80
Bit
Attr
Default
Description
63:30
RV
-
Reserved.
29:28
RWS
0x2
protocol_parity_error: (DB)
00: Error Severity Level 0 (Correctable)
01: Error Severity Level 1 (Recoverable)
10: Error Severity Level 2 (Fatal)
11: Reserved
27:26
RWS
0x2
protocol_qt_overflow_underflow: (DA)
00: Error Severity Level 0 (Correctable)
01: Error Severity Level 1 (Recoverable)
10: Error Severity Level 2 (Fatal)
11: Reserved
25:22
RV
-
Reserved.
21:20
RWS
0x2
protocol_rcvd_unexprsp: (D7)
00: Error Severity Level 0 (Correctable)
01: Error Severity Level 1 (Recoverable)
10: Error Severity Level 2 (Fatal)
11: Reserved
19:10
RV
-
Reserved.
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