Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
431
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
This register allows remapping of the PCIe* errors to the IIO error severity.
14.8.21 SYSMAP
System Error Event map.
This register maps the error severity detected by the IIO to on of the system events. 
When an error is detected by the IIO, its corresponding error severity determines which 
system event to generate according to this register.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x94
Bit
Attr
Default
Description
31:6
RV
-
Reserved.
5:4
RWS
0x2
pciefaterr_map:
10: Map this PCIe* error type to Error Severity 2
01: Map this PCIe* error type to Error Severity 1
00: Map this PCIe* error type to Error Severity 0
3:2
RWS
0x1
pcienonfaterr_map:
10: Map this PCIe* error type to Error Severity 2
01: Map this PCIe* error type to Error Severity 1
00: Map this PCIe* error type to Error Severity 0
1:0
RWS
0x0
pciecorerr_map:
10: Map this PCIe* error type to Error Severity 2
01: Map this PCIe* error type to Error Severity 1
00: Map this PCIe* error type to Error Severity 0
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x9c
Bit
Attr
Default
Description
31:11
RV
-
Reserved.
10:8
RWS
0x1
sev2_map:
010: Generate NMI
001: Generate SMI/PMI
000: No inband message
Others: Reserved
7:7
RV
-
Reserved.
6:4
RWS
0x2
sev1_map:
010: Generate NMI
001: Generate SMI/PMI
000: No inband message
Others: Reserved
3:3
RV
-
Reserved.
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