Intel E7-8891 v2 CM8063601377422 User Manual

436

Intel

®

 Xeon

® 

Processor E7-2800/4800/8800 v2 Product Family

Datasheet Volume Two: Functional Description, February 2014

This register defines the status from PCA9555

43:0

RWS

0x0

vpp_enaddr:

Assigns the VPP address of the device on the VPP interface and assigns the 

port address for the ports within the VPP device. There are more address bits 

then root ports so assignment must be spread across VPP ports.
Addr Port

Root 

Port

[43:41] [40] Port 

3d

[39:37]  [36]    Port 3c
[35:33]  [32]    Port 3b
[31:29]  [28]    Port 3a
[27:25]  [24]    Port 2d
[23:21]  [20]    Port 2c
[19:17]  [16]    Port 2b
[15:13]  [12]    Port 2a
[11:9] [8] Unused
[7:5] [4] 

Unused

[3:1] 

[0] 

Port 0 (PCIe* mode only) 

31:1

RV

-

Reserved.

0:0

RW1CS

0x0

vpp_error:

VPP Port error happened that is, an unexpected STOP of NACK was seen on 

the VPP port

31:24

RWS

0x1e

vpp_tpf:

Pulse Filter should be set to 60 nS. The value used is dependent on the 

internal clock frequency. In this case, internal clock frequency is 500 MHz, so 

the default value represents 60 nS at that rate.

23:16

RWS

0x96

vpp_thd_data:

Hold time for Data is 300 nS. The default value is set to 300 nS when the 

internal clock rate is 500 MHz.

15:12

RV

-

Reserved.