Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Integrated I/O (IIO) Configuration Registers
448
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
Datasheet Volume Two: Functional Description, February 2014
14.8.38 GSYSST
Global System Event Status.
This register indicates the error severity signaled by the IIO global error logic. Setting 
of an individual error status bit indicates that the corresponding error severity has been 
detected by the IIO.
14.8.39 GSYSCTL
Global System Event Control.
The system event control register controls/masks the reporting the errors indicated by 
the system event status register. When cleared, the error severity does not cause the 
generation of the system event. When set, detection of the error severity generates 
system events according to system event map register (SYSMAP).
14.8.40 GFFERRST, GFNERRST
Global Fatal FERR and NERR Status.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:2
Offset:
0x1cc
Bit
Attr
Default
Description
31:3
RV
-
Reserved1:
Reserved.
2:2
ROS_V
0x0
sev2:
When set, IIO has detected an error of error severity 2
1:1
ROS_V
0x0
sev1:
When set, IIO has detected an error of error severity 1
0:0
ROS_V
0x0
sev0:
When set, IIO has detected an error of error severity 0
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:2
Offset:
0x1d0
Bit
Attr
Default
Description
31:3
RV
-
Rserved1:
Reserved.
2:2
RW
0x0
sev2_en:
When set, the detection of error severity 2 generates system events.
1:1
RW
0x0
sev1_en:
When set, the detection of error severity 1 generates system events.
0:0
RW
0x0
sev0_en:
When set, the detection of error severity 0 generates system events.
downloadlike
ArtboardArtboardArtboard
Report Bug