Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
469
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.8.53 IIOFFERRHD_[0:3]
IIO Core Fatal FERR Header.
Header log stores the IIO data path header information of the associated IIO core error. 
The header indicates where the error is originating from and the address of the cycle.
The IIO Core Fatal FERR Header totally has 128 bits. Refer to the below table for the 
mapping between Header and IIOFFERRHD_[0:3] registers. 
14.8.54 IIONFERRST, IIONNERRST
IIO Core Non-Fatal FERR and NERR Status.
Bit
Register
Offset
127:96
IIOFFERRHD_3
0x318
95:64
IIOFFERRHD_2
0x314
63:32
IIOFFERRHD_1
0x310
31:0
IIOFFERRHD_0
0x30c
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5Function:2
Offset:
0x30c
Size: 128 bits
Bit
Attr
Default
Description
127:90
RV
-
Reserved.
89:89
ROS_V
0x0
Error Type:
0: MA
1: CA
88:81
ROS_V
0x0
Message Code.
80:65
ROS_V
0x0
MSI Data. 
64:58
ROS_V
0x0
Internal Routing ID. 
57:56
ROS_V
0x0
Fmt.
55:51
ROS_V
0x0
Type. 
50:0
ROS_V
0x0
Address.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
5
Function:
2
Offset:
0x320, 0x334
Bit
Attr
Default
Description
31:7
RV
-
Reserved.
6:0
ROS_V
0x0
iio_core_error_status_log:
The error status log indicates which error is causing the report of the first 
error event. The encoding indicates the corresponding bit position of the 
error in the error status register.
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