Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
503
Datasheet Volume Two: Functional Description, February 2014
Integrated I/O (IIO) Configuration Registers
14.11.19 RX_CTLE_PEAK_GEN2
This register controls the Continuous Time Linear Equalizer (CTLE) setting for the 
named receiver bundles on the selected port on the PCIe* interface in Gen. 2 mode.
14.11.20 RX_CTLE_PEAK_GEN3
This register controls the Continuous Time Linear Equalizer (CTLE) setting for the 
named receiver bundles on the selected port on the PCIe* interface in Gen. 3 mode. 
15:8
RO
0x80
next_ptr:
Pointer to the next capability. If set to 0 to indicate there are no more 
capability structures.
7:0
RO
0x10
capability_id:
Provides the PCI Express capability ID assigned by PCI-SIG.
Type:
CFG
PortID:
N/A
Bus:
0
Device:
6Function:0,3
Bus:
0
Device:
7Function:0
Offset:
0x40
Bit
Attr
Default
Description
Type:
CFG
PortID:
N/A
Bus:
0
Device:
6Function:0
Offset:
0x694
Bit
Attr
Default
Description
31:8
RV
-
Reserved.
7:4
RWS_L
0x8
bndl1:
3:0
RWS_L
0x8
bndl0:
Type:
CFG
PortID:
N/A
Bus:
0
Device:
6Function:3
Bus:
0
Device:
7Function:0
Offset:
0x694
Bit
Attr
Default
Description
31:28
RWS_L
0x8
bndl7:
27:24
RWS_L
0x8
bndl6:
23:20
RWS_L
0x8
bndl5:
19:16
RWS_L
0x8
bndl4:
15:12
RWS_L
0x8
bndl3:
11:8
RWS_L
0x8
bndl2:
7:4
RWS_L
0x8
bndl1:
3:0
RWS_L
0x8
bndl0:
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