Intel E7-8891 v2 CM8063601377422 User Manual

Product codes
CM8063601377422
Page of 504
Intel
®
 Xeon
® 
Processor E7-2800/4800/8800 v2 Product Family
87
Datasheet Volume Two: Functional Description, February 2014
Processor Uncore Configuration Registers
13.1.8
PLAT
13.1.9
HDR
13.1.10 BIST
13.1.11 SVID
Type:
CFG
PortID:
N/A
Bus:
1
Offset:
0xd
Bit
Attr
Default
Description
7:0
RO
0x0
Primary Latency Timer (primary_latency_timer):
Not applicable to PCI Express. Hardwired to 00h.
Type:
CFG
PortID:
N/A
Bus:
1
Device:
29
Offset:
0xe
Bit
Attr
Default
Description
7:7
RO
0x1
Multifunction Device (multi_function_device):
This bit defaults to 1b since all these devices are multifunction
6:0
RO
0x0
Configuration Layout (configuration_layout):
This field identifies the format of the configuration header layout. It is Type 0 
for all these devices. The default is 00h, indicating a 'endpoint device'.
Type:
CFG
PortID:
N/A
Bus:
1
Offset:
0xf
Bit
Attr
Default
Description
7:0
RO
0x0
BIST Tests (bist_tests):
Not supported. Hardwired to 00h
Type:
CFG
PortID:
N/A
Bus:
1
Offset:
0x2c
Bit
Attr
Default
Description
15:0
RW_O
0x8086
Subsystem Vendor Identification Number. 
(subsystem_vendor_identification_number):
The default value specifies Intel but can be set to any value once after reset.
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