Intel J1750 FH8065301562600 User Manual
Product codes
FH8065301562600
6
Datasheet
PCU – Power Management Controller (PMC) .......................................................... 957
19.1 Signal Descriptions .......................................................................................... 957
19.2 Features......................................................................................................... 959
19.3 USB Per-Port Register Write Control ................................................................... 966
19.4 References...................................................................................................... 967
19.5 PCU PMC Memory Mapped I/O Registers ............................................................. 968
19.6 PCU PMC IO Registers .................................................................................... 1002
19.7 PCU iLB PMC I/O Registers .............................................................................. 1005
19.1 Signal Descriptions .......................................................................................... 957
19.2 Features......................................................................................................... 959
19.3 USB Per-Port Register Write Control ................................................................... 966
19.4 References...................................................................................................... 967
19.5 PCU PMC Memory Mapped I/O Registers ............................................................. 968
19.6 PCU PMC IO Registers .................................................................................... 1002
19.7 PCU iLB PMC I/O Registers .............................................................................. 1005
PCU – Serial Peripheral Interface (SPI) ............................................................... 1023
20.1 Signal Descriptions ........................................................................................ 1023
20.2 Features....................................................................................................... 1024
20.3 Use.............................................................................................................. 1037
20.4 PCU SPI for Firmware Memory Mapped I/O Registers .......................................... 1039
20.1 Signal Descriptions ........................................................................................ 1023
20.2 Features....................................................................................................... 1024
20.3 Use.............................................................................................................. 1037
20.4 PCU SPI for Firmware Memory Mapped I/O Registers .......................................... 1039
PCU – Universal Asynchronous Receiver/Transmitter (UART) .............................. 1075
21.1 Signal Descriptions ........................................................................................ 1075
21.2 Features....................................................................................................... 1076
21.3 Use.............................................................................................................. 1078
21.4 UART Enable/Disable...................................................................................... 1078
21.5 Register Map................................................................................................. 1079
21.6 IO Mapped Registers ...................................................................................... 1079
21.7 PCU iLB UART IO Registers.............................................................................. 1080
21.1 Signal Descriptions ........................................................................................ 1075
21.2 Features....................................................................................................... 1076
21.3 Use.............................................................................................................. 1078
21.4 UART Enable/Disable...................................................................................... 1078
21.5 Register Map................................................................................................. 1079
21.6 IO Mapped Registers ...................................................................................... 1079
21.7 PCU iLB UART IO Registers.............................................................................. 1080
PCU – System Management Bus (SMBus) ............................................................. 1089
22.1 Signal Descriptions ........................................................................................ 1089
22.2 Features....................................................................................................... 1090
22.3 Use.............................................................................................................. 1096
22.4 References.................................................................................................... 1097
22.5 Register Map................................................................................................. 1097
22.6 PCU SMBus PCI Configuration Registers ............................................................ 1099
22.7 PCU SMBus Memory Mapped I/O Registers ........................................................ 1114
22.8 PCU SMBus I/O Registers................................................................................ 1125
22.1 Signal Descriptions ........................................................................................ 1089
22.2 Features....................................................................................................... 1090
22.3 Use.............................................................................................................. 1096
22.4 References.................................................................................................... 1097
22.5 Register Map................................................................................................. 1097
22.6 PCU SMBus PCI Configuration Registers ............................................................ 1099
22.7 PCU SMBus Memory Mapped I/O Registers ........................................................ 1114
22.8 PCU SMBus I/O Registers................................................................................ 1125
23.1 Signal Descriptions ........................................................................................ 1138
23.2 Features....................................................................................................... 1139
23.3 PCU iLB Interrupt Decode and Route ................................................................ 1141
23.2 Features....................................................................................................... 1139
23.3 PCU iLB Interrupt Decode and Route ................................................................ 1141
PCU – iLB – Low Pin Count (LPC) Bridge .............................................................. 1180
24.1 Signal Descriptions ........................................................................................ 1180
24.2 Features....................................................................................................... 1181
24.3 Use.............................................................................................................. 1186
24.4 References.................................................................................................... 1187
24.5 Register Map................................................................................................. 1187
24.6 PCU iLB Low Pin Count (LPC) Bridge PCI Configuration Registers .......................... 1189
24.7 PCU iLB LPC BIOS Control Memory Mapped I/O Registers .................................... 1209
24.1 Signal Descriptions ........................................................................................ 1180
24.2 Features....................................................................................................... 1181
24.3 Use.............................................................................................................. 1186
24.4 References.................................................................................................... 1187
24.5 Register Map................................................................................................. 1187
24.6 PCU iLB Low Pin Count (LPC) Bridge PCI Configuration Registers .......................... 1189
24.7 PCU iLB LPC BIOS Control Memory Mapped I/O Registers .................................... 1209
PCU – iLB – Real Time Clock (RTC) ....................................................................... 1210
25.1 Signal Descriptions ........................................................................................ 1210
25.2 Features....................................................................................................... 1211
25.3 Interrupts..................................................................................................... 1212
25.4 References.................................................................................................... 1213
25.5 Register Map................................................................................................. 1213
25.1 Signal Descriptions ........................................................................................ 1210
25.2 Features....................................................................................................... 1211
25.3 Interrupts..................................................................................................... 1212
25.4 References.................................................................................................... 1213
25.5 Register Map................................................................................................. 1213