Intel Pentium D 830 HH80551PG0802MN Data Sheet
Product codes
HH80551PG0802MN
Datasheet
105
Debug Tools Specifications
9
Debug Tools Specifications
Refer to the eXtended Debug Port: Debug Port Design Guide for UP and DP Platforms and the
ITP700 Debug Port Design Guide for information regarding debug tools specifications. For more
information, contact your Intel sales representative. The ITP700 Debug Port Design Guide is
located at http://www.intel.com/design/xeon/guides/249679.htm.
ITP700 Debug Port Design Guide for information regarding debug tools specifications. For more
information, contact your Intel sales representative. The ITP700 Debug Port Design Guide is
located at http://www.intel.com/design/xeon/guides/249679.htm.
9.1
Logic Analyzer Interface (LAI)
Intel is working with two logic analyzer vendors to provide logic analyzer interfaces (LAIs) for use
in debugging Intel
in debugging Intel
®
Pentium
®
D processor systems. Tektronix* and Agilent* should be contacted
to get specific information about their logic analyzer interfaces. The following information is
general in nature. Specific information must be obtained from the logic analyzer vendor.
general in nature. Specific information must be obtained from the logic analyzer vendor.
Due to the complexity of Pentium D processor systems, the LAI is critical in providing the ability
to probe and capture FSB signals. There are two sets of considerations to keep in mind when
designing a Pentium D processor system that can make use of an LAI: mechanical and electrical.
to probe and capture FSB signals. There are two sets of considerations to keep in mind when
designing a Pentium D processor system that can make use of an LAI: mechanical and electrical.
9.1.1
Mechanical Considerations
The LAI is installed between the processor socket and the Pentium D processor. The LAI lands
plug into the socket, while the Pentium D processor lands plug into a socket on the LAI. Cabling
that is part of the LAI egresses the system to allow an electrical connection between the Pentium D
processor and a logic analyzer. The maximum volume occupied by the LAI, known as the keepout
volume, as well as the cable egress restrictions, should be obtained from the logic analyzer vendor.
System designers must make sure that the keepout volume remains unobstructed inside the system.
Note that it is possible that the keepout volume reserved for the LAI may differ from the space
normally occupied by the Pentium D processor heatsink. If this is the case, the logic analyzer
vendor will provide a cooling solution as part of the LAI.
plug into the socket, while the Pentium D processor lands plug into a socket on the LAI. Cabling
that is part of the LAI egresses the system to allow an electrical connection between the Pentium D
processor and a logic analyzer. The maximum volume occupied by the LAI, known as the keepout
volume, as well as the cable egress restrictions, should be obtained from the logic analyzer vendor.
System designers must make sure that the keepout volume remains unobstructed inside the system.
Note that it is possible that the keepout volume reserved for the LAI may differ from the space
normally occupied by the Pentium D processor heatsink. If this is the case, the logic analyzer
vendor will provide a cooling solution as part of the LAI.
9.1.2
Electrical Considerations
The LAI will also affect the electrical performance of the FSB; therefore, it is critical to obtain
electrical load models from each of the logic analyzers to be able to run system level simulations to
prove that their tool will work in the system. Contact the logic analyzer vendor for electrical
specifications and load models for the LAI solution they provide.
electrical load models from each of the logic analyzers to be able to run system level simulations to
prove that their tool will work in the system. Contact the logic analyzer vendor for electrical
specifications and load models for the LAI solution they provide.
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