Intel Pentium D 830 HH80551PG0802MN Data Sheet

Product codes
HH80551PG0802MN
Page of 106
16
 Datasheet
 
Electrical Specifications
2.2.3
FSB Decoupling
The Pentium D processor package integrates signal termination on the die as well as incorporates 
high frequency decoupling capacitance on the processor package. Decoupling must also be 
provided by the system baseboard for proper GTL+ bus operation.
2.3
Voltage Identification
The Voltage Identification (VID) specification for the Pentium D processor is defined by the 
Voltage Regulator Down (VRD) 10.1 Design Guide For Desktop LGA775 Socket. The voltage set 
by the VID signals is the reference VR output voltage to be delivered to the processor VCC lands 
(
 for V
CC
 overshoot specifications). Refer to 
 for the DC specifications for 
these signals. A minimum voltage for each processor frequency is provided in 
Individual processor VID values may be calibrated during manufacturing such that two devices at 
the same core speed may have different default VID settings. This is reflected by the VID Range 
values provided in 
.
The Pentium D processor uses six voltage identification signals, VID[5:0], to support automatic 
selection of power supply voltages. 
 specifies the voltage level corresponding to the state 
of VID[5:0]. A ‘1’ in this table refers to a high voltage level and a ‘0’ refers to low voltage level. If 
the processor socket is empty (VID[5:0] = x11111), or the voltage regulation circuit cannot supply 
the voltage that is requested, it must disable itself. See the Voltage Regulator Down (VRD) 10.1 
Design Guide For Desktop LGA775 Socket 
for more details.
The processor provides the ability to operate while transitioning to an adjacent VID and its 
associated processor core voltage (V
CC
). This will represent a DC shift in the load line. It should be 
noted that a low-to-high or high-to-low voltage state change may result in as many VID transitions 
as necessary to reach the target core voltage. Transitions above the specified VID are not permitted. 
Minimum and maximum voltages must be maintained as shown in 
 and 
 as measured across the VCC_SENSE and VSS_SENSE lands.
The VRM or VRD utilized must be capable of regulating its output to the value defined by the new 
VID. DC specifications for dynamic VID transitions are included in 
, and 
. Refer to the Voltage Regulator Down (VRD) 10.1 Design Guide For Desktop LGA775 
Socket for further details.