Intel Phi 7120A SC7120A Data Sheet
Product codes
SC7120A
Intel
®
Xeon Phi™ Coprocessor Datasheet
Document ID Number: 328209 003EN
10
• PCI Express* connections.
• The clock system is integrated in the coprocessor including an on-board 100MHz +/
• The clock system is integrated in the coprocessor including an on-board 100MHz +/
- 50ppm reference clock, and requires only the PCI Express* 100MHz reference
clock input from the motherboard.
clock input from the motherboard.
The Intel
®
Xeon Phi™ coprocessor provides the following high-level features:
• A many-core coprocessor.
• Maximum 16-channel GDDR memory interface with an option to enable ECC.
• PCI Express* 2.0 x16 interface with optional SMBus management interface.
• Node Power and Thermal Management, including power capping support.
• +12V power monitoring and on-board fan Proportional-Integral-Derivative (PID)
• Maximum 16-channel GDDR memory interface with an option to enable ECC.
• PCI Express* 2.0 x16 interface with optional SMBus management interface.
• Node Power and Thermal Management, including power capping support.
• +12V power monitoring and on-board fan Proportional-Integral-Derivative (PID)
controller (3120A and 7120A SKUs).
• On-board flash device that loads the coprocessor OS on boot.
• Card level RAS features and recovery capabilities.
• Card level RAS features and recovery capabilities.
2.1.1
Intel
®
Xeon Phi™ Coprocessor Board Design
The Intel
®
Xeon Phi™ coprocessor is a PCI Express* compliant high-power add-in
product, with an integrated thermal and mechanical solution (see SKU matrix
for exceptions). It supports a maximum of 16 GDDR memory channels, distributed on
both sides of the PCB inside the coprocessor package. Each memory channel supports
two 16-bit wide GDDR device (for a maximum of 32 devices), combining to give 32-bit
wide data.
both sides of the PCB inside the coprocessor package. Each memory channel supports
two 16-bit wide GDDR device (for a maximum of 32 devices), combining to give 32-bit
wide data.
and
show the front and back sides of the PCB. The two
notches along the top edge of the card are used to attach the cooling plate for the
GDDR devices on the backside of the PCB (side not containing the Intel
GDDR devices on the backside of the PCB (side not containing the Intel
®
Xeon Phi™
coprocessor silicon). The VRs are split right and left to help reduce direct current
resistance and current density.
resistance and current density.
The Intel
®
Xeon Phi™ coprocessor supports 2 power groups for a total of 4 primary
low-voltage rails: a group consisting of VDDG, VDDQ, and VSFR power rails, and
another group consisting only of VCCP. The VCCP, VDDG, and VDDQ rails are powered
from the PCI Express* edge connector and the auxiliary 12V inputs. The VSFR rail is
powered from the PCI Express* edge connector 3.3V input (~5W). VCCP is the
coprocessor core voltage rail, while VDDQ, VDDG and VSFR supply power to memory,
portions of the coprocessor and miscellaneous circuitry in the coprocessor.
another group consisting only of VCCP. The VCCP, VDDG, and VDDQ rails are powered
from the PCI Express* edge connector and the auxiliary 12V inputs. The VSFR rail is
powered from the PCI Express* edge connector 3.3V input (~5W). VCCP is the
coprocessor core voltage rail, while VDDQ, VDDG and VSFR supply power to memory,
portions of the coprocessor and miscellaneous circuitry in the coprocessor.