Intel 3560M CW8064701486906 Data Sheet

Product codes
CW8064701486906
Page of 104
Datasheet
31
Electrical Specifications
2.8.5
BCLK[1:0] Specifications (CK410 based Platforms)
Table 18.
Front Side Bus Differential BCLK Specifications
Symbol
Parameter
Min
Typ
Max
Unit Figure Notes
1
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
V
L
Input Low Voltage
-0.150
0.00
0
N/A
V
-
V
H
Input High Voltage
0.660
0.70
0
0.850
V
-
V
CROSS(abs)
Absolute Crossing 
Point
0.250
N/A
0.550
V
2, 3
2.
Crossing voltage is defined as the instantaneous voltage value when the rising edge of BCLK0 equals the
falling edge of BCLK1. 
3.
The crossing point must meet the absolute and relative crossing point specifications simultaneously.
V
CROSS(rel)
Relative Crossing 
Point
0.250 + 
0.5(V
Havg
 – 0.700)
N/A
0.550 + 
0.5(V
Havg
 – 0.700)
V
4, 
4.
V
Havg
 is the statistical average of the V
H
 measured by the oscilloscope.
5.
V
Havg
 can be measured directly using “Vtop” on Agilent* oscilloscopes and “High” on Tektronix* oscilloscopes.
 ΔV
CROSS
Range of Crossing 
Points
N/A
N/A
0.140
V
-
V
OS
Overshoot
N/A
N/A
V
+ 0.3
V
6
6.
vershoot is defined as the absolute value of the maximum voltage. 
V
US
Undershoot
-0.300 N/A
N/A
V
7
7.
Undershoot is defined as the absolute value of the minimum voltage.
V
RBM
Ringback Margin
0.200
N/A
N/A
V
8
8.
Ringback Margin is defined as the absolute voltage difference between the maximum Rising Edge Ringback
and the maximum Falling Edge Ringback.
V
TM
Threshold Region
V
CROSS
 – 0.100
N/A
V
CROSS
 + 0.100
V
9
9.
Threshold Region is defined as a region entered around the crossing point voltage in which the differential
receiver switches. It includes input threshold hysteresis.
Figure 6.
Differential Clock Crosspoint Specification
660 670 680 690 700 710 720 730 740 750 760 770 780 790 800 810 820 830 840 850
200
250
300
350
400
450
500
550
600
650
VHavg (mV)
Cr
os
s
in
g
 Poi
n
(m
V
)
550 mV
250 mV
250 + 0.5 (VHavg - 700)
550 + 0.5 (VHavg - 700)