Intel E3-1246 v3 CM8064601575205 User Manual

Product codes
CM8064601575205
Page of 116
Figure 14.
Package C-State Entry and Exit
C0
C1
C6
C7
C3
Package C0 State
This is the normal operating state for the processor. The processor remains in the
normal state when at least one of its cores is in the C0 or C1 state or when the
platform has not granted permission to the processor to go into a low power state.
Individual cores may be in lower power idle states while the package is in C0 state.
Package C1/C1E State
No additional power reduction actions are taken in the package C1 state. However, if
the C1E sub-state is enabled, the processor automatically transitions to the lowest
supported core clock frequency, followed by a reduction in voltage.
The package enters the C1 state low power state when:
At least one core is in the C1 state.
The other cores are in a C1 or deeper power state.
The package enters the C1E state when:
All cores have directly requested C1E using MWAIT(C1) with a C1E sub-state hint.
All cores are in a power state deeper than C1/C1E state but the package low
power state is limited to C1/C1E using the PMG_CST_CONFIG_CONTROL MSR.
All cores have requested C1 state using HLT or MWAIT(C1) and C1E auto-
promotion is enabled in IA32_MISC_ENABLES.
No notification to the system occurs upon entry to C1/C1E state.
Processor—Power Management
Intel
®
 Xeon
®
 Processor E3-1200 v3 Product Family
Datasheet – Volume 1 of 2
June 2013
56
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