Intel E5-2680 v3 CM8064401439612 User Manual

Intel® Xeon® Processor E5-1600/E5-2600/E5-4600 Product Families

67

Datasheet Volume One

The WrPCIConfigLocal() command provides sideband write access to the PCI 
configuration space that resides within the processor. PECI originators can access this 
space even before BIOS enumeration of the system buses. The exact listing of 
supported devices and functions for writes using this command on the processor is 
defined in 

. The write accesses to registers that are locked will not take effect 

but will still return a completion code of 0x40. However, write accesses to registers that 
are hidden will return a completion code of 0x90.

Because a WrPCIConfigLocal() command results in an update to potentially critical 
registers inside the processor, it includes an Assured Write FCS (AW FCS) byte as 
part of the write data payload. In the event that the AW FCS mismatches with the 
client-calculated FCS, the client will abort the write and will always respond with a bad 
write FCS.

PCI Configuration addresses are constructed as shown in 

command is subject to the same address configuration rules as defined in 

. PCI configuration writes may be issued in byte, word or dword 

granularity.

The WrPCIConfigLocal() format is as follows:

Write Length: 0x07 (byte), 0x08 (word), 0x0a (dword)

Read Length: 0x01

Command: 0xe5

AW FCS Support: Yes

Description: Writes the data sent to the requested register address. Write Length 
dictates the desired write granularity. The command always returns a completion code 
indicating pass/fail status. Refer to

 for details on completion codes. 

CC: 0x82

The processor hardware resources required to service this command are in a low power 

state. Retry may be appropriate after modification of PECI wake mode behavior if 

appropriate.

CC: 0x90

Unknown/Invalid/Illegal Request

CC: 0x91

PECI control hardware, firmware or associated logic error. The processor is unable to 

process the request.