Intel G3250 CM8064601482514 User Manual

Product codes
CM8064601482514
Page of 112
Introduction 
20
Datasheet, Volume 1
Intel
®
 VT-d
Intel
®
 Virtualization Technology (Intel
®
 VT) for Directed I/O. Intel  VT-d is a hardware 
assist, under system software (Virtual Machine Manager or operating system) control, 
for enabling I/O device virtualization. Intel VT-d also brings robust security by 
providing protection from errant DMAs by using DMA remapping, a key feature of Intel 
VT-d.
IOV
I/O Virtualization
ISA
Industry Standard Architecture. This is a legacy computer bus standard for IBM PC 
compatible computers. 
ITPM
Integrated Trusted Platform Module
LCD
Liquid Crystal Display
LFM
Low Frequency Mode
LPC
Low Pin Count
LPM
Low Power Mode
LVDS
Low Voltage Differential Signaling. A high speed, low power data transmission 
standard used for display connections to LCD panels.
MLE
Measured Launched Environment 
MSI
Message Signaled Interrupt
NCTF
Non-Critical to Function. NCTF locations are typically redundant ground or non-critical 
reserved, so the loss of the solder joint continuity at end of life conditions will not 
affect the overall product functionality.
ODT
On-Die Termination
PAIR
Power Aware Interrupt Routing
PCH
Platform Controller Hub. The chipset with centralized platform capabilities including the 
main I/O interfaces along with display connectivity, audio features, power 
management, manageability, security and storage features.
PECI
Platform Environment Control Interface.
PEG
PCI Express* Graphics. External Graphics using PCI Express* Architecture. A high-
speed serial interface whose configuration is software compatible with the existing PCI 
specifications.
PGA
Pin Grid Array
PLL
Phase Lock Loop
PME
Power Management Event
PPD
Precharged Power Down
Processor
The 64-bit, single-core or multi-core component (package).
Processor Core
The term “processor core” refers to Si die itself that can contain multiple execution 
cores. Each execution core has an instruction cache, data cache, and 256-KB L2 cache. 
All execution cores share the L3 cache.
Processor Graphics
Intel Processor Graphics
Rank
A unit of DRAM corresponding four to eight devices in parallel, ignoring ECC. These 
devices are usually, but not always, mounted on a single side of a SO-DIMM.
SCI
System Control Interrupt. Used in ACPI protocol.
Intel SDRRS 
Technology
Intel Seamless Display Refresh Rate Switching Technology
SMEP
 Supervisor Mode Execution Protection
Table 1-2.
Terminology  (Sheet 2 of 3)
Term
Description