Hynix HMT351R7BFR8A-H9T8 User Manual

To guarantee tight setup and hold times as well as output skew parameters with respect to clock and 

strobe, each cross point voltage of differential input signals (CK, CK and DQS, DQS) must meet the 

requirements in table below. The differential input cross point voltage VIX is measured from the actual 

cross point of true and complement signals to the midlevel between of VDD and VSS

Notes:
1. Extended range for V

IX

 is only allowed for clock and if single-ended clock input signals CK and CK are 

monotonic with a single-ended swing VSEL / VSEH of at least VDD/2 +/-250 mV, and when the differential 

slew rate of CK - CK is larger than 3 V/ns.



2. Refer to the table "Single-ended levels for CK, DQS, DQSL, DQSU, CK, DQS, DQSL or DQSU" on page 37 

for VSEL and VSEH standard values.

V

IX

Differential Input Cross Point Voltage 

relative to VDD/2 for CK, CK

-150

150

mV

-175

175

mV

1

V

IX

Differential Input Cross Point Voltage 

relative to VDD/2 for DQS, DQS

-150

150

mV

VDD

VSS

VDD/2

V

IX

V

IX

V

IX

CK, DQS

CK, DQS