Hynix HMT351R7BFR8A-H9T8 User Manual

When the Reference load for timing measurements, output slew rate for falling and rising edges is defined 
and measured between V

OL(AC)

 and V

OH(AC)

 for single ended signals are shown in table and figure below.

Notes:
1. Output slew rate is verified by design and characterisation, and may not be subject to production test.

Description: SR; Slew Rate
Q: Query Output (like in DQ, which stands for Data-in, Query-Output)
se: Single-ended Signals
For Ron = RZQ/7 setting
Note 1): In two cases, a maximum slew rate of 6 V/ns applies for a single DQ signal within a byte lane. 

Case_1 is defined for a single DQ signal within a byte lane which is switching into a certain direction 

(either from high to low or low to high) while all remaining DQ signals in the same byte lane are static(i.e 

they stay at either high or low). 
Case_2 is defined for a single DQ signal within a byte lane which is switching into a certain direction 

(either from high to low or low to high) while all remaining DQ signals in the same byte lane are switching 

into the opposite direction (i.e from low to high or high to low respectively). For the remaining DQ signal 

switching into the opposite direction, the regular maximum limit of 5 V/ns applies. 

Single-ended output slew rate for rising edge

V

OL(AC)

V

OH(AC)

[V

OH(AC)

-V

OL(AC)

] / DeltaTRse

Single-ended output slew rate for falling edge

V

OH(AC)

V

OL(AC)

[V

OH(AC)

-V

OL(AC)

] / DeltaTFse

Single-ended Output Slew Rate

SRQse

1.75

5

1)

1.75

5

1)

1.75

5

1)

V/ns

Delta TFse

Delta TRse

vOH(AC)

vOl(AC)

V∏

Si

ng

le En

ded O

ut

put

 V

olt

age(

l.e.

DQ

)

Single Ended Output Slew Rate Definition