Hynix HMT325R7BFR8C-H9T7 User Manual
Rev. 1.5 / Mar. 2012
38
Slew Rate Definitions for Single-Ended Input Signals
See 7.5 “Address / Command Setup, Hold and Derating” on page 137 in “DDR3 Device Operation” for sin-
gle-ended slew rate definitions for address and command signals.
See 7.6 “Data Setup, Hold and Slew Rate Derating” on page 144 in “DDR3 Device Operation” for single-
ended slew rate definition for data signals.
Slew Rate Definitions for Differential Input Signals
Input slew rate for differential signals (CK, CK and DQS, DQS) are defined and measured as shown in table
and figure below.
and figure below.
Notes:
The differential signal (i.e. CK-CK and DQS-DQS) must be linear between these thresholds.
The differential signal (i.e. CK-CK and DQS-DQS) must be linear between these thresholds.
Differential Input Slew Rate Definition for DQS, DQS and CK, CK
Differential Input Slew Rate Definition
Description
Measured
Defined by
Min
Max
Differential input slew rate for rising edge
(CK-CK and DQS-DQS)
(CK-CK and DQS-DQS)
VILdiffmax
VIHdiffmin [VIHdiffmin-VILdiffmax] / DeltaTRdiff
Differential input slew rate for falling edge
(CK-CK and DQS-DQS)
(CK-CK and DQS-DQS)
VIHdiffmin
VILdiffmax [VIHdiffmin-VILdiffmax] / DeltaTFdiff
Delta
TFdiff
Delta
TRdiff
vIHdiffmin
vILdiffmax
0
Differential Inp
ut
Voltag
e (i.e. DQS-DQS;
CK-CK
)
Differential Input Slew Rate Definition for DQS, DQS# and CK, CK#