Intel PentiumD 950 HH80553PG0964M User Manual

Product codes
HH80553PG0964M
Page of 112
Features
92
Datasheet
6.2.1
Normal State
This is the normal operating state for the processor.
6.2.2
HALT and Enhanced HALT Powerdown States
The processor supports the HALT or Enhanced HALT powerdown state. The Enhanced 
HALT Powerdown state is configured and enabled via the BIOS. The Enhanced HALT 
state must be enabled via the BIOS for the processor to remain within its 
specifications
The Enhanced HALT state is a lower power state as compared to the Stop Grant State.
6.2.2.1
HALT Powerdown State
HALT is a low power state entered when all the logical processors have executed the 
HALT or MWAIT instructions. When one of the logical processors executes the HALT 
instruction, that logical processor is halted; however, the other processor continues 
normal operation. The processor will transition to the Normal state upon the occurrence 
of SMI#, BINIT#, INIT#, or LINT[1:0] (NMI, INTR). RESET# will cause the processor to 
immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either 
Normal Mode or the HALT Power Down state. See the Intel Architecture Software 
Developer's Manual, Volume III: System Programmer's Guide for more information.
Figure 16.
Processor Low Power State Machine
Enhanced HALT or HALT State
BCLK running
Snoops and interrupts allowed
Normal State
Normal execution
Enhanced HALT Snoop or HALT
Snoop State
BCLK running
Service snoops to caches
Stop Grant State
BCLK running
Snoops and interrupts allowed
Snoop
Event
Occurs
Snoop
Event
Serviced
INIT#, BINIT#, INTR, NMI, SMI#,
RESET#, FSB interrupts
STPCLK#
Asserted
STPCLK#
De-asserted
S
TPCL
K
#
Asse
rted
STP
CL
K
#
D
e-
asse
rte
d
Snoop Event Occurs
Snoop Event Serviced
HALT or MWAIT Instruction and
HALT Bus Cycle Generated
Stop Grant Snoop State
BCLK running
Service snoops to caches