AMD Sempron 3800+ SDA3800IAA3CN Product Datasheet

Product codes
SDA3800IAA3CN
Page of 3
2
31805
Rev. 3.05
September 2006
AMD Sempron™ Processor Product Data Sheet
939-Pin Package Specific Features
Refer to the AMD Functional Data Sheet, 
939-Pin Package, order# 31411
, for functional, 
electrical, and mechanical details of 939-pin 
package processors
Packaging
939-pin lidded micro PGA
1.27-mm pin pitch
31x31-row pin array
40mm x 40mm organic substrate
Organic C4 die attach
Integrated Memory Controller
Low-latency, high-bandwidth
144-bit DDR SDRAM at 100, 133, 166, and 
200 MHz
Supports up to four unbuffered DIMMs
ECC checking with double-bit detect and single-bit 
correct
Electrical Interfaces
HyperTransport™ technology: LVDS-like 
differential, unidirectional
DDR SDRAM: SSTL_2 per JEDEC specification
Clock, reset, and test signals also use DDR 
SDRAM-like electrical specifications
Socket AM2 Processor Specific 
Features
Refer to the Socket AM2 Processor Functional 
Data Sheet, order# 31117
, for functional and 
mechanical details of socket AM2 processors. 
Refer to the AMD NPT Family 0Fh Processor 
Electrical Data Sheet, order# 31119
, for 
electrical details of socket AM2 processors.
Packaging
Lidded micro PGA
1.27-mm pin pitch
31x31 grid array
Compliant with RoHS (EU Directive 2002/95/EC) 
with lead used only in small amounts in specifically 
exempted applications
Integrated Memory Controller
Low-latency, high-bandwidth
128-bit DDR2 SDRAM controller operating at up 
to 333 MHz
Supports up to four unbuffered DIMMs
Electrical Interfaces
HyperTransport™ technology: LVDS-like 
differential, unidirectional
DDR2 SDRAM: SSTL_1.8 per JEDEC 
specification
Clock, reset, and test signals also use DDR2 
SDRAM-like electrical specifications