IBM Intel Xeon X7350 44E4243 Data Sheet
Product codes
44E4243
Thermal Specifications
106
Document Number: 318080-002
6.2.5
PROCHOT# Signal
An external signal, PROCHOT# (processor hot) is asserted when the temperature of
either processor die has reached its factory configured trip point. If Thermal Monitor is
enabled (note that Thermal Monitor must be enabled for the processor to be operating
within specification), the TCC will be active when PROCHOT# is asserted. The processor
can be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#. Refer to the Intel
either processor die has reached its factory configured trip point. If Thermal Monitor is
enabled (note that Thermal Monitor must be enabled for the processor to be operating
within specification), the TCC will be active when PROCHOT# is asserted. The processor
can be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#. Refer to the Intel
®
64 and IA-32 Architectures Software Developer’s
Manual.
PROCHOT# is designed to assert at or a few degrees higher than maximum T
CASE
(as
specified by Thermal Profile) when dissipating TDP power, and cannot be interpreted as
an indication of processor case temperature. This temperature delta accounts for
processor package, lifetime and manufacturing variations and attempts to ensure the
Thermal Control Circuit is not activated below maximum T
an indication of processor case temperature. This temperature delta accounts for
processor package, lifetime and manufacturing variations and attempts to ensure the
Thermal Control Circuit is not activated below maximum T
CASE
when dissipating TDP
power. There is no defined or fixed correlation between the PROCHOT# trip
temperature, or the case temperature. Thermal solutions must be designed to the
processor specifications and cannot be adjusted based on experimental measurements
of T
temperature, or the case temperature. Thermal solutions must be designed to the
processor specifications and cannot be adjusted based on experimental measurements
of T
CASE
, or PROCHOT#.
6.2.6
FORCEPR# Signal
The FORCEPR# (force power reduction) input can be used by the platform to cause the
Intel
Intel
®
Xeon
®
Processor 7200 Series and 7300 Series to activate the TCC. If the
Thermal Monitor is enabled, the TCC will be activated upon the assertion of the
FORCEPR# signal. Assertion of the FORCEPR# signal will activate TCC for all processor
cores. The TCC will remain active until the system deasserts FORCEPR#. FORCEPR# is
an asynchronous input. FORCEPR# can be used to thermally protect other system
components. To use the VR as an example, when FORCEPR# is asserted, the TCC
circuit in the processor will activate, reducing the current consumption of the processor
and the corresponding temperature of the VR.
FORCEPR# signal. Assertion of the FORCEPR# signal will activate TCC for all processor
cores. The TCC will remain active until the system deasserts FORCEPR#. FORCEPR# is
an asynchronous input. FORCEPR# can be used to thermally protect other system
components. To use the VR as an example, when FORCEPR# is asserted, the TCC
circuit in the processor will activate, reducing the current consumption of the processor
and the corresponding temperature of the VR.
It should be noted that assertion of FORCEPR# does not automatically assert
PROCHOT#. As mentioned previously, the PROCHOT# signal is asserted when a high
temperature situation is detected. A minimum pulse width of 500 µs is recommended
when FORCEPR# is asserted by the system. Sustained activation of the FORCEPR#
signal may cause noticeable platform performance degradation.
PROCHOT#. As mentioned previously, the PROCHOT# signal is asserted when a high
temperature situation is detected. A minimum pulse width of 500 µs is recommended
when FORCEPR# is asserted by the system. Sustained activation of the FORCEPR#
signal may cause noticeable platform performance degradation.
6.2.7
THERMTRIP# Signal
Regardless of whether or not Thermal Monitor or Thermal Monitor 2 is enabled, in the
event of a catastrophic cooling failure, the processor will automatically shut down when
either die has reached an elevated temperature (refer to the THERMTRIP# definition in
event of a catastrophic cooling failure, the processor will automatically shut down when
either die has reached an elevated temperature (refer to the THERMTRIP# definition in
). At this point, the FSB signal THERMTRIP# will go active and stay active as
described in
. THERMTRIP# activation is independent of processor activity and
does not generate any bus cycles. If THERMTRIP# is asserted, processor core voltage
(V
(V
CC
) must be removed within the time frame defined in
.
Intel also recommends the removal of V
TT
.