AMD Phenom 8650 Triple-Core HD8650WCGHBOX User Manual

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Rev. 3.16 February 2008

When an address mapped by a guest uses a larger page size than the host, the TLB entry created uses 
the size of the smaller page; this is referred to as page splintering. TLB entries that are the result of 
page splintering may not be invalidated when the large page is invalidated in the guest using 
INVLPGA.

Unpredictable system behavior may result due to inconsistent entries in the TLB.

The hypervisor should always intercept INVLPGA instructions. On returning to the guest from the 
INVLPGA intercept the hypervisor should set TLB_Control = 1 in the VMCB to ensure correctness.

Yes