AMD Phenom 8650 Triple-Core HD8650WCGHBOX User Manual

41322

Rev. 3.16 February 2008

Processor current consumption may exceed the IDDIO maximum specified for C0/S0 operation 
during power-up sequencing.

None expected if the VDDIO voltage regulator is sourced by a RUN (running) plane from the power 
supply during power-up sequencing. Otherwise, during power-up sequencing the VDDIO voltage 
regulator may shut down if IDDIO exceeds the platform budget or the power supply may shut down if 
the SUS (suspend) rail current capacity is exceeded.

Three options exist to ensure the VDDIO voltage regulator is sourced with sufficient current during 
processor power-up sequencing:

1. Enable the VDDIO voltage regulator after POWER_GOOD is asserted from the high-current 

(RUN) source rail.

2. Provide a path for a high-current (RUN) rail to source current to the VDDIO voltage regulator 

prior to POWER_GOOD assertion from the high-current (RUN) rail. This solution assumes the 
high-current (RUN) rail is enabled early enough relative to enabling the VDDIO voltage 
regulator.

3. Choose a power supply with increased capacity for the rail sourcing the VDDIO voltage regulator 

during power-up sequencing. The capacity required is system specific and should allocate 7 amps 
per processor in the power budget. The following is an example of a supply current capacity 
calculation assuming a 5 V suspend rail and 3 W rest of system power for a single-processor 
system. Other platform-specific factors such as power supply or regulator efficiencies should also 
be considered.

•

 Rest of system (non-processor) power = 3 W

•

 Processor power = 7 A/processor * 1 processor * 1.8 V = 12.6 W

•

 Source rail capacity = (rest of system power + processor power) / source rail voltage; (3 W + 
12.6 W) / 5 V = 3.12 A

Yes