Microchip Technology 25AA02E48T-I/OT Memory IC SOT-23-6 2 K 256 x 8 25AA02E48T-I/OT Data Sheet
Product codes
25AA02E48T-I/OT
2008-2013 Microchip Technology Inc.
DS20002123D-page 9
25AA02E48/25AA02E64
2.4
Write Enable (WREN) and Write
Disable (WRDI)
The 25AA02EXX contains a write enable latch. See
for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
completed internally. The WREN instruction will set the
latch, and the WRDI will reset the latch.
The following is a list of conditions under which the
write enable latch will be reset:
• Power-up
• WRDI instruction successfully executed
• WRSR instruction successfully executed
• WRITE instruction successfully executed
• WP pin is brought low
write enable latch will be reset:
• Power-up
• WRDI instruction successfully executed
• WRSR instruction successfully executed
• WRITE instruction successfully executed
• WP pin is brought low
FIGURE 2-4:
WRITE ENABLE SEQUENCE (WREN)
FIGURE 2-5:
WRITE DISABLE SEQUENCE (WRDI)
SCK
0
2
3
4
5
6
7
1
SI
High-Impedance
SO
CS
0
1
0
0
0
0
0
1
SCK
0
2
3
4
5
6
7
1
SI
High-Impedance
SO
CS
0
1
0
0
0
0
0
0