Microchip Technology IC MCU OTP 2KX PIC17C42A-16/P DIP-40 MCP PIC17C42A-16/P Data Sheet
Product codes
PIC17C42A-16/P
1996 Microchip Technology Inc.
DS30412C-page 39
PIC17C4X
6.3
Stack Operation
The PIC17C4X devices have a 16 x 16-bit wide hard-
ware stack (Figure 6-1). The stack is not part of either
the program or data memory space, and the stack
pointer is neither readable nor writable. The PC is
“PUSHed” onto the stack when a
ware stack (Figure 6-1). The stack is not part of either
the program or data memory space, and the stack
pointer is neither readable nor writable. The PC is
“PUSHed” onto the stack when a
CALL
instruction is
executed or an interrupt is acknowledged. The stack is
“POPed” in the event of a
“POPed” in the event of a
RETURN
,
RETLW
, or a
RETFIE
instruction execution. PCLATH is not affected by a
“PUSH” or a “POP” operation.
“PUSH” or a “POP” operation.
The stack operates as a circular buffer, with the stack
pointer initialized to '0' after all resets. There is a stack
available bit (STKAV) to allow software to ensure that
the stack has not overflowed. The STKAV bit is set after
a device reset. When the stack pointer equals Fh,
STKAV is cleared. When the stack pointer rolls over
from Fh to 0h, the STKAV bit will be held clear until a
device reset.
pointer initialized to '0' after all resets. There is a stack
available bit (STKAV) to allow software to ensure that
the stack has not overflowed. The STKAV bit is set after
a device reset. When the stack pointer equals Fh,
STKAV is cleared. When the stack pointer rolls over
from Fh to 0h, the STKAV bit will be held clear until a
device reset.
After the device is “PUSHed” sixteen times (without a
“POP”), the seventeenth push overwrites the value
from the first push. The eighteenth push overwrites the
second push (and so on).
“POP”), the seventeenth push overwrites the value
from the first push. The eighteenth push overwrites the
second push (and so on).
Note 1: There is not a status bit for stack under-
flow. The STKAV bit can be used to detect
the underflow which results in the stack
pointer being at the top of stack.
the underflow which results in the stack
pointer being at the top of stack.
Note 2: There are no instruction mnemonics
called PUSH or POP. These are actions
that occur from the execution of the
that occur from the execution of the
CALL
,
RETURN
,
RETLW
, and
RETFIE
instruc-
tions, or the vectoring to an interrupt vec-
tor.
tor.
Note 3: After a reset, if a “POP” operation occurs
before a “PUSH” operation, the STKAV bit
will be cleared. This will appear as if the
stack is full (underflow has occurred). If a
“PUSH” operation occurs next (before
another “POP”), the STKAV bit will be
locked clear. Only a device reset will
cause this bit to set.
will be cleared. This will appear as if the
stack is full (underflow has occurred). If a
“PUSH” operation occurs next (before
another “POP”), the STKAV bit will be
locked clear. Only a device reset will
cause this bit to set.
6.4
Indirect Addressing
Indirect addressing is a mode of addressing data
memory where the data memory address in the
instruction is not fixed. That is, the register that is to be
read or written can be modified by the program. This
can be useful for data tables in the data memory.
Figure 6-10 shows the operation of indirect address-
ing. This shows the moving of the value to the data
memory address specified by the value of the FSR
register.
memory where the data memory address in the
instruction is not fixed. That is, the register that is to be
read or written can be modified by the program. This
can be useful for data tables in the data memory.
Figure 6-10 shows the operation of indirect address-
ing. This shows the moving of the value to the data
memory address specified by the value of the FSR
register.
Example 6-1 shows the use of indirect addressing to
clear RAM in a minimum number of instructions. A
similar concept could be used to move a defined num-
ber of bytes (block) of data to the USART transmit reg-
ister (TXREG). The starting address of the block of
data to be transmitted could easily be modified by the
program.
clear RAM in a minimum number of instructions. A
similar concept could be used to move a defined num-
ber of bytes (block) of data to the USART transmit reg-
ister (TXREG). The starting address of the block of
data to be transmitted could easily be modified by the
program.
FIGURE 6-10: INDIRECT ADDRESSING
Opcode
Address
File = INDFx
FSR
Instruction
Executed
Executed
Instruction
Fetched
Fetched
RAM
Opcode
File