Microchip Technology IC MCU OTP 2KX PIC17C42A-16/P DIP-40 MCP PIC17C42A-16/P Data Sheet
Product codes
PIC17C42A-16/P
PIC17C4X
DS30412C-page 60
1996 Microchip Technology Inc.
9.4
PORTD and DDRD Registers
PORTD is an 8-bit bi-directional port. The correspond-
ing data direction register is DDRD. A '1' in DDRD con-
figures the corresponding port pin as an input. A '0' in
the DDRC register configures the corresponding port
pin as an output. Reading PORTD reads the status of
the pins, whereas writing to it will write to the port latch.
PORTD is multiplexed with the system bus. When
operating as the system bus, PORTD is the high order
byte of the address/data bus (AD15:AD8). The timing
for the system bus is shown in the Electrical Character-
istics section.
ing data direction register is DDRD. A '1' in DDRD con-
figures the corresponding port pin as an input. A '0' in
the DDRC register configures the corresponding port
pin as an output. Reading PORTD reads the status of
the pins, whereas writing to it will write to the port latch.
PORTD is multiplexed with the system bus. When
operating as the system bus, PORTD is the high order
byte of the address/data bus (AD15:AD8). The timing
for the system bus is shown in the Electrical Character-
istics section.
Note:
This port is configured as the system bus
when the device’s configuration bits are
selected to Microprocessor or Extended
Microcontroller modes. In the two other
microcontroller modes, this port is a gen-
eral purpose I/O.
when the device’s configuration bits are
selected to Microprocessor or Extended
Microcontroller modes. In the two other
microcontroller modes, this port is a gen-
eral purpose I/O.
Example 9-3 shows the instruction sequence to initial-
ize PORTD. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized.
ize PORTD. The Bank Select Register (BSR) must be
selected to Bank 1 for the port to be initialized.
EXAMPLE 9-3:
INITIALIZING PORTD
MOVLB
1
; Select Bank 1
CLRF
PORTD
; Initialize PORTD data
;
latches before setting
;
the data direction
;
register
MOVLW
0xCF
; Value used to initialize
; data direction
MOVWF
DDRD
; Set RD<3:0> as inputs
;
RD<5:4> as outputs
;
RD<7:6> as inputs
FIGURE 9-7:
PORTD BLOCK DIAGRAM (IN I/O PORT MODE)
Note: I/O pins have protection diodes to V
DD
and Vss.
Q
D
CK
TTL
0
1
Q
D
CK
R
S
Input
Buffer
Buffer
Port
Data
to D_Bus
→
IR
INSTRUCTION READ
Data Bus
RD_PORTD
WR_PORTD
RD_DDRD
WR_DDRD
EX_EN
DATA/ADDR_OUT
DRV_SYS
SYS BUS
Control
Control