Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT Data Sheet
Product codes
PIC18F65K22-I/PT
PIC18F87K22 FAMILY
DS39960D-page 122
2009-2011 Microchip Technology Inc.
8.1
External Memory Bus Control
The operation of the interface is controlled by the
MEMCON register (
MEMCON register (
). This register is
available in all program memory operating modes
except Microcontroller mode. In this mode, the register
is disabled and cannot be written to.
The EBDIS bit (MEMCON<7>) controls the operation
of the bus and related port functions. Clearing EBDIS
enables the interface and disables the I/O functions of
the ports, as well as any other functions multiplexed to
those pins. Setting the bit enables the I/O ports and
other functions, but allows the interface to override
everything else on the pins when an external memory
operation is required. By default, the external bus is
always enabled and disables all other I/O.
except Microcontroller mode. In this mode, the register
is disabled and cannot be written to.
The EBDIS bit (MEMCON<7>) controls the operation
of the bus and related port functions. Clearing EBDIS
enables the interface and disables the I/O functions of
the ports, as well as any other functions multiplexed to
those pins. Setting the bit enables the I/O ports and
other functions, but allows the interface to override
everything else on the pins when an external memory
operation is required. By default, the external bus is
always enabled and disables all other I/O.
The operation of the EBDIS bit is also influenced by the
program memory mode being used. This is discussed
in more detail in
program memory mode being used. This is discussed
in more detail in
.
The WAIT bits allow for the addition of Wait states to
external memory operations. The use of these bits is
discussed in
external memory operations. The use of these bits is
discussed in
.
The WM bits select the particular operating mode used
when the bus is operating in 16-Bit Data Width mode.
These bits are discussed in more detail in
when the bus is operating in 16-Bit Data Width mode.
These bits are discussed in more detail in
. These bits have no effect
when an 8-Bit Data Width mode is selected.
REGISTER 8-1:
MEMCON: EXTERNAL MEMORY BUS CONTROL REGISTER
)
R/W-0
U-0
R/W-0
R/W-0
U-0
U-0
R/W-0
R/W-0
EBDIS
—
WAIT1
WAIT0
—
—
WM1
WM0
bit 7
bit 0
Legend:
R = Readable bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
EBDIS
: External Bus Disable bit
1
= External bus is enabled when microcontroller accesses external memory; otherwise, all external
bus drivers are mapped as I/O ports
0
= External bus is always enabled, I/O ports are disabled
bit 6
Unimplemented
: Read as ‘0’
bit 5-4
WAIT<1:0>:
Table Reads and Writes Bus Cycle Wait Count bits
11
= Table reads and writes will wait 0 T
CY
10
= Table reads and writes will wait 1 T
CY
01
= Table reads and writes will wait 2 T
CY
00
= Table reads and writes will wait 3 T
CY
bit 3-2
Unimplemented
: Read as ‘0’
bit 1-0
WM<1:0>:
TBLWT Operation with 16-Bit Data Bus Width Select bits
1x
= Word Write mode: TABLAT word output; WRH is active when TABLAT is written
01
= Byte Select mode: TABLAT data is copied on both MSB and LSB; WRH and (UB or LB) will activate
00
= Byte Write mode: TABLAT data is copied on both MSB and LSB; WRH or WRL will activate
Note 1:
Unimplemented on 64-pin devices (PIC18F6XK22), read as ‘0’.