Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT Data Sheet
Product codes
PIC18F65K22-I/PT
PIC18F87K22 FAMILY
DS39960D-page 240
2009-2011 Microchip Technology Inc.
TABLE 18-4:
ALRMVAL REGISTER
MAPPING
MAPPING
18.2.9
CALIBRATION
The real-time crystal input can be calibrated using the
periodic auto-adjust feature. When properly calibrated,
the RTCC can provide an error of less than three
seconds per month.
To perform this calibration, find the number of error
clock pulses and store the value into the lower half of
the RTCCAL register. The eight-bit, signed value,
loaded into RTCCAL, is multiplied by four and will be
either added or subtracted from the RTCC timer, once
every minute.
To calibrate the RTCC module:
1.
periodic auto-adjust feature. When properly calibrated,
the RTCC can provide an error of less than three
seconds per month.
To perform this calibration, find the number of error
clock pulses and store the value into the lower half of
the RTCCAL register. The eight-bit, signed value,
loaded into RTCCAL, is multiplied by four and will be
either added or subtracted from the RTCC timer, once
every minute.
To calibrate the RTCC module:
1.
Use another timer resource on the device to find
the error of the 32.768 kHz crystal.
the error of the 32.768 kHz crystal.
2.
Convert the number of error clock pulses per
minute (see
minute (see
• If the oscillator is faster than ideal (negative
result from Step 2), the RCFGCALL register
value needs to be negative. This causes the
specified number of clock pulses to be
subtracted from the timer counter, once every
minute.
value needs to be negative. This causes the
specified number of clock pulses to be
subtracted from the timer counter, once every
minute.
• If the oscillator is slower than ideal (positive
result from Step 2), the RCFGCALL register
value needs to be positive. This causes the
specified number of clock pulses to be added to
the timer counter, once every minute.
value needs to be positive. This causes the
specified number of clock pulses to be added to
the timer counter, once every minute.
3.
Load the RTCCAL register with the correct
value.
value.
Writes to the RTCCAL register should occur only when
the timer is turned off or immediately after the rising
edge of the seconds pulse.
the timer is turned off or immediately after the rising
edge of the seconds pulse.
18.3
Alarm
The Alarm features and characteristics are:
• Configurable from half a second to one year
• Enabled using the ALRMEN bit (ALRMCFG<7>,
• Configurable from half a second to one year
• Enabled using the ALRMEN bit (ALRMCFG<7>,
)
• Offers one-time and repeat alarm options
18.3.1
CONFIGURING THE ALARM
The alarm feature is enabled using the ALRMEN bit.
This bit is cleared when an alarm is issued. The bit will
not be cleared if the CHIME bit = 1 or if ALRMRPT
This bit is cleared when an alarm is issued. The bit will
not be cleared if the CHIME bit = 1 or if ALRMRPT
0.
The interval selection of the alarm is configured
through the ALRMCFG bits (AMASK<3:0>); see
through the ALRMCFG bits (AMASK<3:0>); see
. These bits determine which, and how
many, digits of the alarm must match the clock value for
the alarm to occur.
The alarm can also be configured to repeat based on a
preconfigured interval. The number of times this
occurs, after the alarm is enabled, is stored in the
ALRMRPT register.
the alarm to occur.
The alarm can also be configured to repeat based on a
preconfigured interval. The number of times this
occurs, after the alarm is enabled, is stored in the
ALRMRPT register.
ALRMPTR<1:0>
Alarm Value Register Window
ALRMVALH
ALRMVALL
00
ALRMMIN
ALRMSEC
01
ALRMWD
ALRMHR
10
ALRMMNTH
ALRMDAY
11
—
—
EQUATION 18-1:
CONVERTING ERROR
CLOCK PULSES
CLOCK PULSES
(Ideal Frequency (32,758) – Measured Frequency) * 60 =
Error Clocks per Minute
Error Clocks per Minute
Note:
In determining the crystal’s error value, it
is the user’s responsibility to include the
crystal’s initial error from drift due to
temperature or crystal aging.
is the user’s responsibility to include the
crystal’s initial error from drift due to
temperature or crystal aging.
Note:
While the alarm is enabled (ALRMEN = 1),
changing any of the registers, other than
the RTCCAL, ALRMCFG and ALRMRPT
registers and the CHIME bit, can result in a
false alarm event leading to a false alarm
interrupt. To avoid this, only change the
timer and alarm values while the alarm is
disabled (ALRMEN = 0). It is recom-
mended that the ALRMCFG and
ALRMRPT registers and CHIME bit be
changed when RTCSYNC = 0.
changing any of the registers, other than
the RTCCAL, ALRMCFG and ALRMRPT
registers and the CHIME bit, can result in a
false alarm event leading to a false alarm
interrupt. To avoid this, only change the
timer and alarm values while the alarm is
disabled (ALRMEN = 0). It is recom-
mended that the ALRMCFG and
ALRMRPT registers and CHIME bit be
changed when RTCSYNC = 0.