Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT Data Sheet

DS39960D-page 394

 2009-2011 Microchip Technology Inc.

27.4.2

CAPACITANCE CALIBRATION

There is a small amount of capacitance from the inter-
nal A/D Converter sample capacitor, as well as stray
capacitance from the circuit board traces and pads that
affect the precision of capacitance measurements. A
measurement of the stray capacitance can be taken by
making sure the desired capacitance to be measured
has been removed.
After removing the capacitance to be measured:
1.

Initialize the A/D Converter and the CTMU.

2.

Set EDG1STAT (= 1).

3.

Wait for a fixed delay of time, t.

4.

Clear EDG1STAT.

5.

Perform an A/D conversion.

6.

Calculate the stray and A/D sample capacitances: 

Where:
• I is known from the current source measurement 

step

• t is a fixed delay
• V is measured by performing an A/D conversion

This measured value is then stored and used for
calculations of time measurement or subtracted for
capacitance measurement. For calibration, it is
expected that the capacitance of C

STRAY

+ C

AD

 is

approximately known; C

AD

 is approximately 4 pF. 

An iterative process may be required to adjust the time,
t, that the circuit is charged to obtain a reasonable volt-
age reading from the A/D Converter. The value of t may
be determined by setting C

OFFSET

 to a theoretical value

and solving for t. For example, if C

STRAY

 is theoretically

calculated to be 11 pF, and V is expected to be 70% of
V

DD

 or 2.31V, t would be:

or 63

s.

See 

 for a typical routine for CTMU

capacitance calibration.

C

OFFSET

 = C

STRAY

 + C

AD

 = (I • t)/V

(4 pF + 11 pF) • 2.31V/0.55 

A