Microchip Technology IC MCU 8BIT PIC18F65K22-I/PT TQFP-64 MCP PIC18F65K22-I/PT Data Sheet

DS39960D-page 6

 2009-2011 Microchip Technology Inc.

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64 63 62 61

21 22 23 24 25 26 27 28 29 30 31 32

RE2/P2B/CCP10

/CS

/AD10

RE4/P3B/CCP8

/AD12

RE5/P1C/CCP7

/AD13

RE6/P1B/CCP6

/AD14

RE7/ECCP2/P2A/AD15

RD0/PSP0/CTPLS/AD0

V

DD

V

SS

RD1/T5CKI/T7G/PSP1/A

D1

RD2/PSP2/AD2

RD3/PSP3/AD3

RD4/SDO2/PSP4/AD4

RD5/SDI2/SDA2/PSP5/

A

D5

RD6/SCK2/SCL2/PSP6

/AD6

RD7/SS2

/PSP7/AD7

RE1/P2C/WR/AD9

RE0/P2D/RD/AD8

RG0/ECCP3/P3A

RG1/TX2/CK2/AN19/C3OUT

RG2/RX2/DT2/AN18/C3INA

RG3/CCP4/AN17/P3D/C3INB

MCLR/RG5

RG4/RTCC/T7CKI

/T5G/CCP5/AN16/P1D/C3INC

V

SS

V

DDCORE

/V

CAP

RF7/AN5/SS1

RB0/INT0/FLT0
RB1/INT1
RB2/INT2/CTED1
RB3/INT3/CTED2/ECCP2

/P2A

RB4/KBI0
RB5/KBI1/T3CKI/T1G
RB6/KBI2/PGC
V

SS

OSC2/CLKO/RA6
OSC1/CLKI/RA7
V

DD

RB7/KBI3/PGD

RC4/SDI1/SDA1
RC3/SCK1/SCL1
RC2/ECCP1/P1A

E

N

VREG

RF1/AN6/C2O

U

T/CTDIN

AV

DD

AV

SS

RA3/AN3/V

RE

F

+

RA2/AN2/V

RE

F

-

RA1/AN1

RA0/AN0/ULPWU

V

SS

V

DD

RA4/T0CKI

RA5/AN4/T1CKI/T3G/HL

V

DI

N

RC1/SOSC/ECCP2/P2A

RC0/SOSCO/SCKL

I

RC7/RX1/DT1

RC6/TX1/CK1

RC5/SDO1

RJ0/ALE

RJ1/OE

RH1/AN22/A17

RH0/AN23/A16

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2

RH2/AN21/A18
RH3/AN20/A19

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18

RH7/CCP6

/P1B/AN15

RH6/CCP7

/P1C/AN14/C1INC

RH5/CCP8

/P3B/AN13/C2IND

RH4/CCP9

/P3C/AN12/C2INC

RJ5/CE

RJ4/BA0

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RJ7/UB
RJ6/LB

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49

RJ2/WRL
RJ3/WRH

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59

68 67 66 65

72 71 70 69

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RF5/AN10/C1INB

RF4/AN9/C2INA

RF3/AN8/C2INB/CTMUI

RF2/AN7/C1OUT

RF6/AN11/C1INA

The ECCP2 pin placement depends on the CCP2MX Configuration bit setting and whether the device is
in Microcontroller or Extended Microcontroller mode.

Not available on the PIC18F65K22 and PIC18F85K22 devices.

The CC6, CCP7, CCP8 and CCP9 pin placement depends on the setting of the ECCPMX Configuration
bit (CONFIG3H<1>).

RE3/P3C/CCP9

)/

REF0/AD1

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