Microchip Technology XC8 Standard Compiler (Workstation) SW006021-1 SW006021-1 User Manual
Product codes
SW006021-1
MPLAB
®
XC8 C Compiler User’s Guide
DS52053B-page 138
2012 Microchip Technology Inc.
5.3.6.1
SPECIAL BASELINE/MID-RANGE REGISTER ISSUES
Some SFRs are not memory mapped, do not have a corresponding variable defined in
the device specific header file, and cannot be directly accessed from C code.
the device specific header file, and cannot be directly accessed from C code.
For example, the W register is not memory mapped on baseline devices. Some devices
use OPTION and TRIS registers, that are only accessible via special instructions and
that are also not memory mapped. See Section 5.3.9 “Baseline PIC MCU Special
Instructions” on how these registers are accessed by the compiler.
use OPTION and TRIS registers, that are only accessible via special instructions and
that are also not memory mapped. See Section 5.3.9 “Baseline PIC MCU Special
Instructions” on how these registers are accessed by the compiler.
5.3.6.2
SPECIAL PIC18 REGISTER ISSUES
Some of the SFRs associated with the PIC18 can be grouped to form multi-byte values,
e.g., the TMRxH and TMRxL register combined form a 16-bit timer count value.
Depending on the device and mode of operation, there may be hardware requirements
to read these registers in certain ways, e.g., often the TMRxL register must be read
before trying to read the TMRxH register to obtain a valid 16-bit result.
e.g., the TMRxH and TMRxL register combined form a 16-bit timer count value.
Depending on the device and mode of operation, there may be hardware requirements
to read these registers in certain ways, e.g., often the TMRxL register must be read
before trying to read the TMRxH register to obtain a valid 16-bit result.
Although it is possible to define a word-sized C variable to map over such registers, i.e.,
an int variable TMRx that maps over both TMRxL and TMRxH, the order in which the
compiler would read the bytes of such an object will vary from expression to expres-
sion. Some expressions require that the Most Significant Byte (MSB) is read first;
others start with the Least Significant Byte (LSB) first.
an int variable TMRx that maps over both TMRxL and TMRxH, the order in which the
compiler would read the bytes of such an object will vary from expression to expres-
sion. Some expressions require that the Most Significant Byte (MSB) is read first;
others start with the Least Significant Byte (LSB) first.
It is recommended that the existing SFR definitions in the chip header files be used.
Each byte of the SFR should be accessed directly, and in the required order, as dictated
by the device data sheet. This results in a much higher degree of portability.
Each byte of the SFR should be accessed directly, and in the required order, as dictated
by the device data sheet. This results in a much higher degree of portability.
The following code copies the two timer registers into a C unsigned variable count
for subsequent use.
for subsequent use.
count = TMR0L;
count += TMR0H << 8;
Macros are also provided to perform reading and writing of the more common timer reg-
isters. See the macros READTIMERx and WRITETIMERx in Appendix A. “Library
Functions”. These guarantee the correct byte order is used.
isters. See the macros READTIMERx and WRITETIMERx in Appendix A. “Library
Functions”. These guarantee the correct byte order is used.